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author | York Sun <york.sun@nxp.com> | 2016-12-28 08:43:30 -0800 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2017-01-04 19:40:17 -0500 |
commit | 2c2e2c9e14462a34bb99ba281c7445c3174a0fe6 (patch) | |
tree | 72b24b0a25f145b31e4e9a0866211a8b386f1877 /arch/powerpc/cpu | |
parent | 53c953841bbb2c094144bff00b41501b635f3153 (diff) | |
download | u-boot-imx-2c2e2c9e14462a34bb99ba281c7445c3174a0fe6.zip u-boot-imx-2c2e2c9e14462a34bb99ba281c7445c3174a0fe6.tar.gz u-boot-imx-2c2e2c9e14462a34bb99ba281c7445c3174a0fe6.tar.bz2 |
crypto: Move SYS_FSL_SEC_COMPAT into driver Kconfig
Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC
and ARM SoCs, move it to Kconfig under the driver.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc/cpu')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 9fde7a0..1d4f702 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -325,29 +325,41 @@ config ARCH_B4420 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_B4860 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_BSC9131 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_BSC9132 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_C29X bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_6 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_MPC8536 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_MPC8540 @@ -357,20 +369,28 @@ config ARCH_MPC8540 config ARCH_MPC8541 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 config ARCH_MPC8544 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_MPC8548 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_MPC8555 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 config ARCH_MPC8560 bool @@ -379,84 +399,118 @@ config ARCH_MPC8560 config ARCH_MPC8568 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 config ARCH_MPC8569 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 config ARCH_MPC8572 bool select FSL_LAW select SYS_PPC_E500_USE_DEBUG_TLB + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 config ARCH_P1010 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_P1011 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_P1020 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_P1021 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_P1022 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_P1023 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_P1024 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_P1025 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_P2020 bool select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB config ARCH_P2041 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_P3041 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_P4080 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_P5020 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_P5040 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_QEMU_E500 bool @@ -465,41 +519,57 @@ config ARCH_T1023 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_5 config ARCH_T1024 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_5 config ARCH_T1040 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_5 config ARCH_T1042 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_5 config ARCH_T2080 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_T2081 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_T4160 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config ARCH_T4240 bool select E500MC select FSL_LAW + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_4 config BOOKE bool |