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| author | Ruchika Gupta <ruchika.gupta@freescale.com> | 2014-09-29 11:35:33 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-10-16 14:17:42 -0700 |
| commit | 7cad2e38d61e27ea59fb7944f7e647e97ef292d3 (patch) | |
| tree | 315fab51b9302a8977f19cfc8cb1b5cddbbb0af4 /arch/powerpc/cpu | |
| parent | 4ba4a095da4f7d38270ee22cc1a1ce64fa47d009 (diff) | |
| download | u-boot-imx-7cad2e38d61e27ea59fb7944f7e647e97ef292d3.zip u-boot-imx-7cad2e38d61e27ea59fb7944f7e647e97ef292d3.tar.gz u-boot-imx-7cad2e38d61e27ea59fb7944f7e647e97ef292d3.tar.bz2 | |
powerpc/mpc85xx: SECURE BOOT - Bypass PAMU in case of secure boot
By default, PAMU's (IOMMU) are enabled in case of secure boot.
Disable/bypass them once the control reaches the bootloader.
For non-secure boot, PAMU's are already bypassed in the default
SoC configuration.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 963e326..85d32fc 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -426,7 +426,8 @@ ulong cpu_init_f(void) { ulong flag = 0; extern void m8560_cpm_reset (void); -#ifdef CONFIG_SYS_DCSRBAR_PHYS +#if defined(CONFIG_SYS_DCSRBAR_PHYS) || \ + (defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET)) ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif #if defined(CONFIG_SECURE_BOOT) @@ -458,6 +459,12 @@ ulong cpu_init_f(void) #if defined(CONFIG_SYS_CPC_REINIT_F) disable_cpc_sram(); #endif + +#if defined(CONFIG_FSL_CORENET) + /* Put PAMU in bypass mode */ + out_be32(&gur->pamubypenr, FSL_CORENET_PAMU_BYPASS); +#endif + #endif #ifdef CONFIG_CPM2 |