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| author | Ed Swarthout <Ed.Swarthout@freescale.com> | 2011-03-03 18:28:14 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-03-05 10:16:24 -0600 |
| commit | e81241af5ab2d084714b9d5617ec6a5cf9dd01ff (patch) | |
| tree | ee4a5b3ee77c28bba496a9d0869bc40c34b84521 /arch/powerpc/cpu | |
| parent | d89a976c13914641529e68b748f6193103840392 (diff) | |
| download | u-boot-imx-e81241af5ab2d084714b9d5617ec6a5cf9dd01ff.zip u-boot-imx-e81241af5ab2d084714b9d5617ec6a5cf9dd01ff.tar.gz u-boot-imx-e81241af5ab2d084714b9d5617ec6a5cf9dd01ff.tar.bz2 | |
powerpc/85xx: Fix plat_mp_up() disabling of BPTR for CoreNet Platforms
Copying directly from ECM/PQ3 is not correct for how CoreNet based
platforms handle boot page translation.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/mp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c index a019b1b..6c0da83 100644 --- a/arch/powerpc/cpu/mpc85xx/mp.c +++ b/arch/powerpc/cpu/mpc85xx/mp.c @@ -1,5 +1,5 @@ /* - * Copyright 2008-2010 Freescale Semiconductor, Inc. + * Copyright 2008-2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -288,7 +288,7 @@ static void plat_mp_up(unsigned long bootpg) * unusable for normal operation but it does allow OSes to easily * reset a processor core to put it back into U-Boot's spinloop. */ - clrbits_be32(&ecm->bptr, 0x80000000); + clrbits_be32(&ccm->bstrar, LAW_EN); #endif } #else |