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authorPrabhakar Kushwaha <prabhakar@freescale.com>2012-02-14 22:49:29 +0000
committerAndy Fleming <afleming@freescale.com>2012-04-24 23:58:30 -0500
commita4107f86173256e6c8710af717805512f5dbbf85 (patch)
tree73b266eb01edf68a5dcd602da21f48fda7da5d90 /arch/powerpc/cpu/ppc4xx/speed.c
parent617e46e3c01da2785d320d48d1248c97edbab685 (diff)
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powerpc/85xx:Avoid hardcoded vector address for IVORs
For e500 and e500v2 architecturees processor IVPR address should be alinged on 64K boundary. in start.S, CONFIG_SYS_MONITOR_BASE is stored blindly in IVPR assuming it to be 64K aligned. It may not be true always. If it is not aligned, IVPR + IVORs may not point to an exception handler. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/ppc4xx/speed.c')
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