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| author | Tirumala Marri <tmarri@apm.com> | 2010-09-28 14:15:14 -0700 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2010-10-04 11:15:02 +0200 |
| commit | 1b8fec1393e33d72d0e24f55ed597673b1c9e884 (patch) | |
| tree | 4a4decf6305d3e96805ea9fcab3b61034e5c05c7 /arch/powerpc/cpu/ppc4xx/cpu.c | |
| parent | dd09985499ac95484974eb0f832fe47b33369952 (diff) | |
| download | u-boot-imx-1b8fec1393e33d72d0e24f55ed597673b1c9e884.zip u-boot-imx-1b8fec1393e33d72d0e24f55ed597673b1c9e884.tar.gz u-boot-imx-1b8fec1393e33d72d0e24f55ed597673b1c9e884.tar.bz2 | |
APM821xx: Add CPU support
APM821XX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.
Signed-off-by: Tirumala R Marri <tmarri@apm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/powerpc/cpu/ppc4xx/cpu.c')
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/cpu.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c index 6009b0c..67f1fff 100644 --- a/arch/powerpc/cpu/ppc4xx/cpu.c +++ b/arch/powerpc/cpu/ppc4xx/cpu.c @@ -250,6 +250,20 @@ static char *bootstrap_str[] = { }; static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' }; #endif +#if defined(CONFIG_APM821XX) +#define SDR0_PINSTP_SHIFT 29 +static char *bootstrap_str[] = { + "RESERVED", + "RESERVED", + "RESERVED", + "NAND (8 bits)", + "NOR (8 bits)", + "NOR (8 bits) w/PLL Bypassed", + "I2C (Addr 0x54)", + "I2C (Addr 0x52)", +}; +static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' }; +#endif #if defined(SDR0_PINSTP_SHIFT) static int bootstrap_option(void) @@ -590,6 +604,11 @@ int checkcpu (void) strcpy(addstr, "No Security support"); break; + case PVR_APM821XX_RA: + puts("APM821XX Rev. A"); + strcpy(addstr, "Security support"); + break; + case PVR_VIRTEX5: puts("440x5 VIRTEX5"); break; |