summaryrefslogtreecommitdiff
path: root/arch/powerpc/cpu/mpc8xxx
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2010-07-14 10:04:21 -0500
committerKumar Gala <galak@kernel.crashing.org>2010-07-26 13:16:08 -0500
commit79e4e6480b359cb28129cecfa2cae0ef9cccf803 (patch)
tree45345be233f602736fd7df42c579b1b3abab6768 /arch/powerpc/cpu/mpc8xxx
parentfd3c9befa83eecf6e7c6ef03c501159fbf754143 (diff)
downloadu-boot-imx-79e4e6480b359cb28129cecfa2cae0ef9cccf803.zip
u-boot-imx-79e4e6480b359cb28129cecfa2cae0ef9cccf803.tar.gz
u-boot-imx-79e4e6480b359cb28129cecfa2cae0ef9cccf803.tar.bz2
powerpc/8xxx: Enabled hwconfig for memory interleaving
Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with hwconfig parameters. The syntax is setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>" The mode values for memory controller interleaving are cacheline page bank superbank The mode values for bank interleaving are cs0_cs1 cs2_cs3 cs0_cs1_and_cs2_cs3 cs0_cs1_cs2_cs3 Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx')
-rw-r--r--arch/powerpc/cpu/mpc8xxx/ddr/options.c40
1 files changed, 25 insertions, 15 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/options.c b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
index 46731c8..11281b7 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
@@ -8,6 +8,7 @@
*/
#include <common.h>
+#include <hwconfig.h>
#include <asm/fsl_ddr_sdram.h>
#include "ddr.h"
@@ -23,7 +24,6 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
unsigned int ctrl_num)
{
unsigned int i;
- const char *p;
/* Chip select options. */
@@ -221,7 +221,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
* should be a subset of the requested configuration.
*/
#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
- if ((p = getenv("memctl_intlv_ctl")) != NULL) {
+ if (hwconfig_sub("fsl_ddr", "ctlr_intlv")) {
if (pdimm[0].n_ranks == 0) {
printf("There is no rank on CS0. Because only rank on "
"CS0 and ranks chip-select interleaved with CS0"
@@ -230,37 +230,47 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
popts->memctl_interleaving = 0;
} else {
popts->memctl_interleaving = 1;
- if (strcmp(p, "cacheline") == 0)
+ /* test null first. if CONFIG_HWCONFIG is not defined
+ * hwconfig_arg_cmp returns non-zero */
+ if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv", "null")) {
+ popts->memctl_interleaving = 0;
+ debug("memory controller interleaving disabled.\n");
+ } else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv", "cacheline"))
popts->memctl_interleaving_mode =
FSL_DDR_CACHE_LINE_INTERLEAVING;
- else if (strcmp(p, "page") == 0)
+ else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv", "page"))
popts->memctl_interleaving_mode =
FSL_DDR_PAGE_INTERLEAVING;
- else if (strcmp(p, "bank") == 0)
+ else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv", "bank"))
popts->memctl_interleaving_mode =
FSL_DDR_BANK_INTERLEAVING;
- else if (strcmp(p, "superbank") == 0)
+ else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv", "superbank"))
popts->memctl_interleaving_mode =
FSL_DDR_SUPERBANK_INTERLEAVING;
- else
- popts->memctl_interleaving_mode =
- simple_strtoul(p, NULL, 0);
+ else {
+ popts->memctl_interleaving = 0;
+ printf("hwconfig has unrecognized parameter for ctlr_intlv.\n");
+ }
}
}
#endif
- if( ((p = getenv("ba_intlv_ctl")) != NULL) &&
+ if ((hwconfig_sub("fsl_ddr", "bank_intlv")) &&
(CONFIG_CHIP_SELECTS_PER_CTRL > 1)) {
- if (strcmp(p, "cs0_cs1") == 0)
+ /* test null first. if CONFIG_HWCONFIG is not defined,
+ * hwconfig_arg_cmp returns non-zero */
+ if (hwconfig_subarg_cmp("fsl_ddr", "bank_intlv", "null"))
+ printf("bank interleaving disabled.\n");
+ else if (hwconfig_subarg_cmp("fsl_ddr", "bank_intlv", "cs0_cs1"))
popts->ba_intlv_ctl = FSL_DDR_CS0_CS1;
- else if (strcmp(p, "cs2_cs3") == 0)
+ else if (hwconfig_subarg_cmp("fsl_ddr", "bank_intlv", "cs2_cs3"))
popts->ba_intlv_ctl = FSL_DDR_CS2_CS3;
- else if (strcmp(p, "cs0_cs1_and_cs2_cs3") == 0)
+ else if (hwconfig_subarg_cmp("fsl_ddr", "bank_intlv", "cs0_cs1_and_cs2_cs3"))
popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_AND_CS2_CS3;
- else if (strcmp(p, "cs0_cs1_cs2_cs3") == 0)
+ else if (hwconfig_subarg_cmp("fsl_ddr", "bank_intlv", "cs0_cs1_cs2_cs3"))
popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_CS2_CS3;
else
- popts->ba_intlv_ctl = simple_strtoul(p, NULL, 0);
+ printf("hwconfig has unrecognized parameter for ba_intlv_ctl.\n");
switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) {
case FSL_DDR_CS0_CS1_CS2_CS3: