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| author | York Sun <yorksun@freescale.com> | 2013-03-25 07:33:20 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-05-14 16:00:27 -0500 |
| commit | 0a7c5353a4cd96d862016356177525da475cb5b0 (patch) | |
| tree | c2187e1c403fb113666e546e09da67f162f82524 /arch/powerpc/cpu/mpc8xxx | |
| parent | 054dfd9b9d9fedac87bffdbde72683e8e678eecc (diff) | |
| download | u-boot-imx-0a7c5353a4cd96d862016356177525da475cb5b0.zip u-boot-imx-0a7c5353a4cd96d862016356177525da475cb5b0.tar.gz u-boot-imx-0a7c5353a4cd96d862016356177525da475cb5b0.tar.bz2 | |
powerpc/mpc8xxx: Fix DDR 3-way interleaving
Should check if interleaving is enabled before using interleaving mode.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx')
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/main.c | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c index 5311a26..1a8d593 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c @@ -541,14 +541,17 @@ phys_size_t fsl_ddr_sdram(void) total_memory = fsl_ddr_compute(&info, STEP_GET_SPD, 0); /* setup 3-way interleaving before enabling DDRC */ - switch (info.memctl_opts[0].memctl_interleaving_mode) { - case FSL_DDR_3WAY_1KB_INTERLEAVING: - case FSL_DDR_3WAY_4KB_INTERLEAVING: - case FSL_DDR_3WAY_8KB_INTERLEAVING: - fsl_ddr_set_intl3r(info.memctl_opts[0].memctl_interleaving_mode); - break; - default: - break; + if (info.memctl_opts[0].memctl_interleaving) { + switch (info.memctl_opts[0].memctl_interleaving_mode) { + case FSL_DDR_3WAY_1KB_INTERLEAVING: + case FSL_DDR_3WAY_4KB_INTERLEAVING: + case FSL_DDR_3WAY_8KB_INTERLEAVING: + fsl_ddr_set_intl3r( + info.memctl_opts[0].memctl_interleaving_mode); + break; + default: + break; + } } /* Program configuration registers. */ |