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authorYork Sun <yorksun@freescale.com>2013-03-25 07:40:06 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-24 16:54:11 -0500
commit5f208d118a8590843aaca723d304b35f2729c141 (patch)
tree84d1df85a082c43f729c6b8e12b86747c923d10d /arch/powerpc/cpu/mpc8xxx
parent3d2972feac4383f5c0f929996976d00f9c072339 (diff)
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powerpc/mpc8xxx: Add T1040 and variant SoCs
T1040 and variants have e5500 cores and are compliant to QorIQ Chassis Generation 2. The major difference between T1040 and its variants is the number of cores and the number of L2 switch ports. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx')
-rw-r--r--arch/powerpc/cpu/mpc8xxx/cpu.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 0087cd0..23e008e 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -85,6 +85,12 @@ static struct cpu_type cpu_type_list[] = {
CPU_TYPE_ENTRY(G4440, G4440, 0),
CPU_TYPE_ENTRY(B4420, B4420, 0),
CPU_TYPE_ENTRY(B4220, B4220, 0),
+ CPU_TYPE_ENTRY(T1040, T1040, 0),
+ CPU_TYPE_ENTRY(T1041, T1041, 0),
+ CPU_TYPE_ENTRY(T1042, T1042, 0),
+ CPU_TYPE_ENTRY(T1020, T1020, 0),
+ CPU_TYPE_ENTRY(T1021, T1021, 0),
+ CPU_TYPE_ENTRY(T1022, T1022, 0),
CPU_TYPE_ENTRY(BSC9130, 9130, 1),
CPU_TYPE_ENTRY(BSC9131, 9131, 1),
CPU_TYPE_ENTRY(BSC9132, 9132, 2),