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authorKumar Gala <galak@kernel.crashing.org>2011-01-31 20:36:02 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-04-04 09:24:40 -0500
commit5df4b0ad0dff3cef1bd6660bcc8cba028c80adcb (patch)
tree2a247b52751d0572ad3fae66f39c94d8da3e20ea /arch/powerpc/cpu/mpc8xxx
parent00203c64648bb2a7e20dac8cde850de6c1044db6 (diff)
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powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()
Every 85xx board implements fsl_ddr_get_mem_data_rate via get_ddr_freq() and every 86xx board uses get_bus_freq(). If implement get_ddr_freq() as a static inline to call get_bus_freq() we can remove fsl_ddr_get_mem_data_rate altogether and just call get_ddr_freq() directly. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx')
-rw-r--r--arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c2
-rw-r--r--arch/powerpc/cpu/mpc8xxx/ddr/ddr.h1
-rw-r--r--arch/powerpc/cpu/mpc8xxx/ddr/util.c6
3 files changed, 3 insertions, 6 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
index cefabe7..ee7ef0f 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
@@ -236,7 +236,7 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr,
* tAXPD=1, need design to confirm.
*/
int tXP = max((get_memory_clk_period_ps() * 3), 7500); /* unit=ps */
- unsigned int data_rate = fsl_ddr_get_mem_data_rate();
+ unsigned int data_rate = get_ddr_freq(0);
tmrd_mclk = 4;
/* set the turnaround time */
trwt_mclk = 1;
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h b/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
index c7c12c1..1e866fe 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
@@ -80,5 +80,4 @@ extern void check_interleaving_options(fsl_ddr_info_t *pinfo);
extern unsigned int mclk_to_picos(unsigned int mclk);
extern unsigned int get_memory_clk_period_ps(void);
extern unsigned int picos_to_mclk(unsigned int picos);
-extern unsigned int fsl_ddr_get_mem_data_rate(void);
#endif
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/util.c b/arch/powerpc/cpu/mpc8xxx/ddr/util.c
index 1e2d921..815c5e3 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/util.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/util.c
@@ -11,8 +11,6 @@
#include "ddr.h"
-unsigned int fsl_ddr_get_mem_data_rate(void);
-
/*
* Round mclk_ps to nearest 10 ps in memory controller code.
*
@@ -24,7 +22,7 @@ unsigned int get_memory_clk_period_ps(void)
{
unsigned int mclk_ps;
- mclk_ps = 2000000000000ULL / fsl_ddr_get_mem_data_rate();
+ mclk_ps = 2000000000000ULL / get_ddr_freq(0);
/* round to nearest 10 ps */
return 10 * ((mclk_ps + 5) / 10);
}
@@ -40,7 +38,7 @@ unsigned int picos_to_mclk(unsigned int picos)
if (!picos)
return 0;
- clks = fsl_ddr_get_mem_data_rate() * (unsigned long long) picos;
+ clks = get_ddr_freq(0) * (unsigned long long) picos;
clks_temp = clks;
clks = clks / ULL_2e12;
if (clks_temp % ULL_2e12) {