diff options
author | Priyanka Jain <Priyanka.Jain@freescale.com> | 2013-09-25 10:41:19 +0530 |
---|---|---|
committer | York Sun <yorksun@freescale.com> | 2013-10-16 16:15:16 -0700 |
commit | 0dd38a35f462b3ba28a49cda2dc80ef57eb52acd (patch) | |
tree | bfb78890aed1b2b08a3ecbeaaefcc03e79e6b9c2 /arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h | |
parent | 262737f05aa94b29d24f21d7eae89756c242df8e (diff) | |
download | u-boot-imx-0dd38a35f462b3ba28a49cda2dc80ef57eb52acd.zip u-boot-imx-0dd38a35f462b3ba28a49cda2dc80ef57eb52acd.tar.gz u-boot-imx-0dd38a35f462b3ba28a49cda2dc80ef57eb52acd.tar.bz2 |
powerpc: Fix CamelCase warnings in DDR related code
Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h
has various parameters with embedded acronyms capitalized that trigger the CamelCase
warning in checkpatch.pl
Convert those variable names to smallcase naming convention and modify all files
which are using these structures with modified structures.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h')
-rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h b/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h index 06706ed..17d8d9f 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h +++ b/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h @@ -12,39 +12,39 @@ typedef struct { /* parameters to constrict */ - unsigned int tCKmin_X_ps; - unsigned int tCKmax_ps; - unsigned int tCKmax_max_ps; - unsigned int tRCD_ps; - unsigned int tRP_ps; - unsigned int tRAS_ps; - - unsigned int tWR_ps; /* maximum = 63750 ps */ - unsigned int tWTR_ps; /* maximum = 63750 ps */ - unsigned int tRFC_ps; /* maximum = 255 ns + 256 ns + .75 ns + unsigned int tckmin_x_ps; + unsigned int tckmax_ps; + unsigned int tckmax_max_ps; + unsigned int trcd_ps; + unsigned int trp_ps; + unsigned int tras_ps; + + unsigned int twr_ps; /* maximum = 63750 ps */ + unsigned int twtr_ps; /* maximum = 63750 ps */ + unsigned int trfc_ps; /* maximum = 255 ns + 256 ns + .75 ns = 511750 ps */ - unsigned int tRRD_ps; /* maximum = 63750 ps */ - unsigned int tRC_ps; /* maximum = 254 ns + .75 ns = 254750 ps */ + unsigned int trrd_ps; /* maximum = 63750 ps */ + unsigned int trc_ps; /* maximum = 254 ns + .75 ns = 254750 ps */ unsigned int refresh_rate_ps; - unsigned int tIS_ps; /* byte 32, spd->ca_setup */ - unsigned int tIH_ps; /* byte 33, spd->ca_hold */ - unsigned int tDS_ps; /* byte 34, spd->data_setup */ - unsigned int tDH_ps; /* byte 35, spd->data_hold */ - unsigned int tRTP_ps; /* byte 38, spd->trtp */ - unsigned int tDQSQ_max_ps; /* byte 44, spd->tdqsq */ - unsigned int tQHS_ps; /* byte 45, spd->tqhs */ + unsigned int tis_ps; /* byte 32, spd->ca_setup */ + unsigned int tih_ps; /* byte 33, spd->ca_hold */ + unsigned int tds_ps; /* byte 34, spd->data_setup */ + unsigned int tdh_ps; /* byte 35, spd->data_hold */ + unsigned int trtp_ps; /* byte 38, spd->trtp */ + unsigned int tdqsq_max_ps; /* byte 44, spd->tdqsq */ + unsigned int tqhs_ps; /* byte 45, spd->tqhs */ unsigned int ndimms_present; unsigned int lowest_common_SPD_caslat; unsigned int highest_common_derated_caslat; unsigned int additive_latency; - unsigned int all_DIMMs_burst_lengths_bitmask; - unsigned int all_DIMMs_registered; - unsigned int all_DIMMs_unbuffered; - unsigned int all_DIMMs_ECC_capable; + unsigned int all_dimms_burst_lengths_bitmask; + unsigned int all_dimms_registered; + unsigned int all_dimms_unbuffered; + unsigned int all_dimms_ecc_capable; unsigned long long total_mem; unsigned long long base_address; |