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| author | York Sun <yorksun@freescale.com> | 2011-01-25 21:51:27 -0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-02-03 02:46:13 -0600 |
| commit | eb0aff77c83f70a01dfe47d72b08467c157f7a8b (patch) | |
| tree | 2052c068799f06106c755937e1d4acc8c9510483 /arch/powerpc/cpu/mpc85xx | |
| parent | 67f944763474d6f42974c43c788fdcea1e12ab28 (diff) | |
| download | u-boot-imx-eb0aff77c83f70a01dfe47d72b08467c157f7a8b.zip u-boot-imx-eb0aff77c83f70a01dfe47d72b08467c157f7a8b.tar.gz u-boot-imx-eb0aff77c83f70a01dfe47d72b08467c157f7a8b.tar.bz2 | |
powerpc/85xx: Rename MPC8572 DDR erratum to DDR115
Use unique erratum number instead of platform number.
Enable command that reports errata on MPC8572DS.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/ddr-gen3.c | 2 |
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 4f8134b..3f139c7 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -74,7 +74,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003 puts("Work-around for Erratum DDR-A003 enabled\n"); #endif - +#ifdef CONFIG_SYS_FSL_ERRATUM_DDR_115 + puts("Work-around for Erratum DDR115 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c index b9502f7..35997f2 100644 --- a/arch/powerpc/cpu/mpc85xx/ddr-gen3.c +++ b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c @@ -178,7 +178,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, * when operatiing in 32-bit bus mode with 4-beat bursts, * This erratum does not affect DDR3 mode, only for DDR2 mode. */ -#ifdef CONFIG_MPC8572 +#ifdef CONFIG_SYS_FSL_ERRATUM_DDR_115 if ((((in_be32(&ddr->sdram_cfg) >> 24) & 0x7) == SDRAM_TYPE_DDR2) && in_be32(&ddr->sdram_cfg) & 0x80000) { /* set DEBUG_1[31] */ |