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| author | Kumar Gala <galak@kernel.crashing.org> | 2011-11-22 06:51:15 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-11-29 08:48:05 -0600 |
| commit | 43f082bb7fc1c24b32a4abc693869c7d14d42829 (patch) | |
| tree | 93f965962cb64edbac52e2ff28125641a68a9299 /arch/powerpc/cpu/mpc85xx | |
| parent | a63d9652757605ec5f7104addc5d38bf10ba8671 (diff) | |
| download | u-boot-imx-43f082bb7fc1c24b32a4abc693869c7d14d42829.zip u-boot-imx-43f082bb7fc1c24b32a4abc693869c7d14d42829.tar.gz u-boot-imx-43f082bb7fc1c24b32a4abc693869c7d14d42829.tar.bz2 | |
powerpc/85xx: Add workaround for erratum CPU-A003999
Erratum A-003999: Running Floating Point instructions requires special
initialization.
Impact:
Floating point arithmetic operations may result in an incorrect value.
Workaround:
Perform a read modify write to set bit 7 to a 1 in SPR 977 before
executing any floating point arithmetic operation. This bit can be set
when setting MSR[FP], and can be cleared when clearing MSR[FP].
Alternatively, the bit can be set once at boot time, and never cleared.
There will be no performance degradation due to setting this bit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/release.S | 6 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/start.S | 6 |
3 files changed, 15 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 253bf08..523f297 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -53,6 +53,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) puts("Work-around for Erratum CPU22 enabled\n"); #endif +#if defined(CONFIG_SYS_FSL_ERRATUM_CPU_A003999) + puts("Work-around for Erratum CPU-A003999 enabled\n"); +#endif #if defined(CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN) puts("Work-around for DDR MSYNC_IN Erratum enabled\n"); #endif diff --git a/arch/powerpc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S index 6678ed4..c81e19c 100644 --- a/arch/powerpc/cpu/mpc85xx/release.S +++ b/arch/powerpc/cpu/mpc85xx/release.S @@ -68,6 +68,12 @@ __secondary_start_page: mtspr SPRN_HID1,r3 #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_CPU_A003999 + mfspr r3,977 + oris r3,r3,0x0100 + mtspr 977,r3 +#endif + /* Enable branch prediction */ lis r3,BUCSR_ENABLE@h ori r3,r3,BUCSR_ENABLE@l diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 7bd5cc0..4d37d6e 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -253,6 +253,12 @@ l2_disabled: mtspr HID1,r0 #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_CPU_A003999 + mfspr r3,977 + oris r3,r3,0x0100 + mtspr 977,r3 +#endif + /* Enable Branch Prediction */ #if defined(CONFIG_BTB) lis r0,BUCSR_ENABLE@h |