diff options
| author | Simon Glass <sjg@chromium.org> | 2012-12-13 20:48:44 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-02-01 15:42:45 -0500 |
| commit | 1206c18403ff25814673a4dbfa071ae06bbefaef (patch) | |
| tree | a4a38c741e9b7a2cb98566785093c3984ec15454 /arch/powerpc/cpu/mpc85xx | |
| parent | 6cb49c13f687fb8c1e2936466edf154f4132abb1 (diff) | |
| download | u-boot-imx-1206c18403ff25814673a4dbfa071ae06bbefaef.zip u-boot-imx-1206c18403ff25814673a4dbfa071ae06bbefaef.tar.gz u-boot-imx-1206c18403ff25814673a4dbfa071ae06bbefaef.tar.bz2 | |
ppc: Move brg_clk to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/commproc.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/speed.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/commproc.c b/arch/powerpc/cpu/mpc85xx/commproc.c index 292b723..7f10476 100644 --- a/arch/powerpc/cpu/mpc85xx/commproc.c +++ b/arch/powerpc/cpu/mpc85xx/commproc.c @@ -110,7 +110,7 @@ m8560_cpm_hostalloc(uint size, uint align) * Baud rate clocks are zero-based in the driver code (as that maps * to port numbers). Documentation uses 1-based numbering. */ -#define BRG_INT_CLK gd->brg_clk +#define BRG_INT_CLK gd->arch.brg_clk #define BRG_UART_CLK ((BRG_INT_CLK + 15) / 16) /* This function is used by UARTS, or anything else that uses a 16x diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 801ee07..8a581ef 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -395,7 +395,7 @@ int get_clocks (void) #ifdef CONFIG_QE gd->qe_clk = sys_info.freqQE; - gd->brg_clk = gd->qe_clk / 2; + gd->arch.brg_clk = gd->qe_clk / 2; #endif /* * The base clock for I2C depends on the actual SOC. Unfortunately, @@ -438,7 +438,7 @@ int get_clocks (void) gd->vco_out = 2*sys_info.freqSystemBus; gd->cpm_clk = gd->vco_out / 2; gd->scc_clk = gd->vco_out / 4; - gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1))); + gd->arch.brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1))); #endif if(gd->cpu_clk != 0) return (0); |