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authorSimon Glass <sjg@chromium.org>2012-12-13 20:48:49 +0000
committerTom Rini <trini@ti.com>2013-02-04 09:05:42 -0500
commit609e6ec3f623f3c3aa2a056654fbc5886e092897 (patch)
treee96d7d41daca9156d94c3a289f3312b46ac74412 /arch/powerpc/cpu/mpc85xx
parent67ac13b1b9b6ca00893714fbc8cbf556bab6fd59 (diff)
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ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_data
Move these fields into arch_global_data and tidy up. This is needed for both ppc and m68k since they share the i2c driver. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
-rw-r--r--arch/powerpc/cpu/mpc85xx/speed.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index f3132fb..81c80e7 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -406,7 +406,7 @@ int get_clocks (void)
*/
#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
- gd->i2c1_clk = sys_info.freqSystemBus;
+ gd->arch.i2c1_clk = sys_info.freqSystemBus;
#elif defined(CONFIG_MPC8544)
/*
* On the 8544, the I2C clock is the same as the SEC clock. This can be
@@ -416,14 +416,14 @@ int get_clocks (void)
* PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
*/
if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
- gd->i2c1_clk = sys_info.freqSystemBus / 3;
+ gd->arch.i2c1_clk = sys_info.freqSystemBus / 3;
else
- gd->i2c1_clk = sys_info.freqSystemBus / 2;
+ gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
#else
/* Most 85xx SOCs use CCB/2, so this is the default behavior. */
- gd->i2c1_clk = sys_info.freqSystemBus / 2;
+ gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
#endif
- gd->i2c2_clk = gd->i2c1_clk;
+ gd->arch.i2c2_clk = gd->arch.i2c1_clk;
#if defined(CONFIG_FSL_ESDHC)
#if defined(CONFIG_MPC8569) || defined(CONFIG_P1010) ||\