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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-06-25 10:39:58 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-06-25 10:39:58 +0200 |
commit | ed1d98d801dfb6384d0f2fff45ce1ebf884944ca (patch) | |
tree | 5a9487c67b75606d3a723b7acb9eda8da200c871 /arch/powerpc/cpu/mpc85xx/t2080_serdes.c | |
parent | 754466ac95e92ebf40e25c6af6f13ab9b4d7c87b (diff) | |
parent | ba9b42c81b0734d53edfbb1fe4a6ded7de78c5ab (diff) | |
download | u-boot-imx-ed1d98d801dfb6384d0f2fff45ce1ebf884944ca.zip u-boot-imx-ed1d98d801dfb6384d0f2fff45ce1ebf884944ca.tar.gz u-boot-imx-ed1d98d801dfb6384d0f2fff45ce1ebf884944ca.tar.bz2 |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/t2080_serdes.c')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/t2080_serdes.c | 27 |
1 files changed, 24 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c index 07e27de..7138bb4 100644 --- a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c @@ -43,6 +43,10 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0x6C, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, PCIE4, PCIE4, PCIE4} }, + {0x1B, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, + SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, + SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x1C, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, @@ -59,18 +63,34 @@ static const struct serdes_config serdes1_cfg_tbl[] = { SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x50, {XAUI_FM1_MAC9, XAUI_FM1_MAC9, + XAUI_FM1_MAC9, XAUI_FM1_MAC9, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x51, {XAUI_FM1_MAC9, XAUI_FM1_MAC9, XAUI_FM1_MAC9, XAUI_FM1_MAC9, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x5E, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x5F, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x64, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x65, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x6A, {XFI_FM1_MAC9, XFI_FM1_MAC10, + XFI_FM1_MAC1, XFI_FM1_MAC2, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x6B, {XFI_FM1_MAC9, XFI_FM1_MAC10, XFI_FM1_MAC1, XFI_FM1_MAC2, PCIE4, SGMII_FM1_DTSEC4, @@ -115,6 +135,9 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0xD9, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0xD2, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, + SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0xD3, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, @@ -127,8 +150,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0x66, {XFI_FM1_MAC9, XFI_FM1_MAC10, XFI_FM1_MAC1, XFI_FM1_MAC2, PCIE4, PCIE4, PCIE4, PCIE4} }, - -#if defined(CONFIG_PPC_T2081) {0xAA, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4} }, {0xCA, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, @@ -137,7 +158,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0x70, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, -#endif {} }; @@ -150,6 +170,7 @@ static const struct serdes_config serdes2_cfg_tbl[] = { {0x29, {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1} }, {0x2D, {SRIO2, SRIO2, SRIO2, SRIO2, SRIO1, SRIO1, SRIO1, SRIO1} }, {0x15, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, SATA1, SATA2} }, + {0x27, {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, SATA1, SATA2} }, {0x18, {PCIE1, PCIE1, PCIE1, PCIE1, AURORA, AURORA, SATA1, SATA2} }, {0x02, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1} }, {0x36, {SRIO2, SRIO2, SRIO2, SRIO2, AURORA, AURORA, SATA1, SATA2} }, |