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| author | Kumar Gala <galak@kernel.crashing.org> | 2011-07-21 00:20:21 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-07-29 08:53:38 -0500 |
| commit | acf3f8da98fdd432a7b0bbcc8c94d706f1bb5c72 (patch) | |
| tree | 85681bacc33dff6bfcd9f40ad2e93c9635dc4ba1 /arch/powerpc/cpu/mpc85xx/start.S | |
| parent | db564bccefaa537b4a2bd46778b00536bab17258 (diff) | |
| download | u-boot-imx-acf3f8da98fdd432a7b0bbcc8c94d706f1bb5c72.zip u-boot-imx-acf3f8da98fdd432a7b0bbcc8c94d706f1bb5c72.tar.gz u-boot-imx-acf3f8da98fdd432a7b0bbcc8c94d706f1bb5c72.tar.bz2 | |
powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E
The P2040/P2040E have no L2 cache. So we utilize the SVR to determine
if we are one of these devices and skip the L2 init code in cpu_init.c
and release. For the device tree we skip the updating of the L2 cache
properties but we still update the chain of caches so the CPC/L3 node
can be properly updated.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/start.S')
0 files changed, 0 insertions, 0 deletions