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author | Scott Wood <scottwood@freescale.com> | 2012-09-20 16:35:21 -0500 |
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committer | Scott Wood <scottwood@freescale.com> | 2012-11-26 15:41:24 -0600 |
commit | b9735cbaebf497209a9cb111bdf02aacdb3b8866 (patch) | |
tree | 667a5b625bfab9a8f75adc982854b1d9f26c05b2 /arch/powerpc/cpu/mpc85xx/spl_minimal.c | |
parent | 510ed3b8fd2a24d06a3252467f229762065a880d (diff) | |
download | u-boot-imx-b9735cbaebf497209a9cb111bdf02aacdb3b8866.zip u-boot-imx-b9735cbaebf497209a9cb111bdf02aacdb3b8866.tar.gz u-boot-imx-b9735cbaebf497209a9cb111bdf02aacdb3b8866.tar.bz2 |
spl/mpc85xx: rename cpu_init_nand.c to spl_minimal.c
There is nothing really NAND-specific about this file.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/spl_minimal.c')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/spl_minimal.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/spl_minimal.c b/arch/powerpc/cpu/mpc85xx/spl_minimal.c new file mode 100644 index 0000000..0589497 --- /dev/null +++ b/arch/powerpc/cpu/mpc85xx/spl_minimal.c @@ -0,0 +1,59 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> +#include <asm/global_data.h> +#include <asm/fsl_ifc.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +void cpu_init_f(void) +{ +#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR) + ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; + + out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR); + + /* set MBECCDIS=1, SBECCDIS=1 */ + out_be32(&l2cache->l2errdis, + (MPC85xx_L2ERRDIS_MBECC | MPC85xx_L2ERRDIS_SBECC)); + + /* set L2E=1 & L2SRAM=001 */ + out_be32(&l2cache->l2ctl, + (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE)); +#endif +} + +#ifndef CONFIG_SYS_FSL_TBCLK_DIV +#define CONFIG_SYS_FSL_TBCLK_DIV 8 +#endif + +void udelay(unsigned long usec) +{ + u32 ticks_per_usec = gd->bus_clk / (CONFIG_SYS_FSL_TBCLK_DIV * 1000000); + u32 ticks = ticks_per_usec * usec; + u32 s = mfspr(SPRN_TBRL); + + while ((mfspr(SPRN_TBRL) - s) < ticks); +} |