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author | Haiying Wang <Haiying.Wang@freescale.com> | 2011-01-20 22:26:31 +0000 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-04 09:24:41 -0500 |
commit | 24995d829aecc6abca0f1b41443ae0cd9b4fde5a (patch) | |
tree | 3154937972cf5d372c82fd6bbe665562a7e28927 /arch/powerpc/cpu/mpc85xx/speed.c | |
parent | 67a719da2e5cfdfa461c5a35c1c5a6a2c5e82d73 (diff) | |
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powerpc/85xx: Refactor Qman/Portal support to be shared between SoCs
There are some differences between CoreNet (P2040, P3041, P5020, P4080)
and and non-CoreNet (P1017, P1023) based SoCs in what features exist and
the memory maps.
* Rename various immap defines to remove _CORENET_ if they are shared
* Added P1023/P1017 specific memory offsets
* Only setup LIODNs or LIODN related code on CORENET based SoCs
(features doesn't exist on P1023/P1017)
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/speed.c')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/speed.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index f2aa8d0..9d749c3 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -162,7 +162,6 @@ void get_sys_info (sys_info_t * sysInfo) sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ; } #endif -#endif #ifdef CONFIG_QE qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO) @@ -170,6 +169,15 @@ void get_sys_info (sys_info_t * sysInfo) sysInfo->freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ; #endif +#ifdef CONFIG_SYS_DPAA_FMAN + sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2; +#if (CONFIG_SYS_NUM_FMAN) == 2 + sysInfo->freqFMan[1] = sysInfo->freqSystemBus / 2; +#endif +#endif + +#endif /* CONFIG_FSL_CORENET */ + #if defined(CONFIG_FSL_LBC) #if defined(CONFIG_SYS_LBC_LCRR) /* We will program LCRR to this value later */ |