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authorHaiying Wang <Haiying.Wang@freescale.com>2011-02-11 01:25:30 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-04-05 10:18:39 -0500
commita52d2f816dac9cf516b4c795d44ce42cbe6aacb3 (patch)
tree1537649316d30b38f942321e83be20f6f47df84f /arch/powerpc/cpu/mpc85xx/speed.c
parentc1fc2d4fc282fb59f42c82fd0b5e8255497093b5 (diff)
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powerpc/85xx: Add P1021 specific QE and UEC support
P1021 has some QE pins which need to be set in pmuxcr register before using QE functions. In this patch, pin QE0 and QE3 are set for UCC1 and UCC5 in Eth mode. QE9 and QE12 are set for MII management. QE12 needs to be released after MII access because QE12 pin is muxed with LBCTL signal. Also added relevant QE support defines unique to P1021. The P1021 QE is shared on P1012, P1016, and P1025. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/speed.c')
-rw-r--r--arch/powerpc/cpu/mpc85xx/speed.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index e530494..c4c156d 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -28,6 +28,7 @@
#include <common.h>
#include <ppc_asm.tmpl>
+#include <linux/compiler.h>
#include <asm/processor.h>
#include <asm/io.h>
@@ -156,7 +157,7 @@ void get_sys_info (sys_info_t * sysInfo)
#endif
int i;
#ifdef CONFIG_QE
- u32 qe_ratio;
+ __maybe_unused u32 qe_ratio;
#endif
plat_ratio = (gur->porpllsr) & 0x0000003e;
@@ -184,10 +185,15 @@ void get_sys_info (sys_info_t * sysInfo)
#endif
#ifdef CONFIG_QE
+#if defined(CONFIG_P1012) || defined(CONFIG_P1016) || \
+ defined(CONFIG_P1021) || defined(CONFIG_P1025)
+ sysInfo->freqQE = sysInfo->freqSystemBus;
+#else
qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO)
>> MPC85xx_PORPLLSR_QE_RATIO_SHIFT;
sysInfo->freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ;
#endif
+#endif
#ifdef CONFIG_SYS_DPAA_FMAN
sysInfo->freqFMan[0] = sysInfo->freqSystemBus;