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| author | Zang Roy-R61911 <tie-fei.zang@freescale.com> | 2013-11-28 13:23:37 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-12-04 14:54:42 -0800 |
| commit | e88f421e7a65e5bd0c6131e5202d710e73dd4aae (patch) | |
| tree | 29daad933328ec9d6d20b8861399ec8f68319e45 /arch/powerpc/cpu/mpc85xx/p5020_ids.c | |
| parent | 7aa6c455c357f6d767acec747bbecb23664eeacb (diff) | |
| download | u-boot-imx-e88f421e7a65e5bd0c6131e5202d710e73dd4aae.zip u-boot-imx-e88f421e7a65e5bd0c6131e5202d710e73dd4aae.tar.gz u-boot-imx-e88f421e7a65e5bd0c6131e5202d710e73dd4aae.tar.bz2 | |
T4240: Address T4240/T4160 Rev2.0 DDR clock change
MEM_PLL_RAT on T4240/T4160 Rev2.0 uses a value which is half of Rev1.0.
It's 12 in Rev1.0, for Rev2.0 it uses 6.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/p5020_ids.c')
0 files changed, 0 insertions, 0 deletions