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author | Zhao Qiang <B45475@freescale.com> | 2014-10-30 14:07:39 +0800 |
---|---|---|
committer | York Sun <yorksun@freescale.com> | 2014-12-05 08:06:09 -0800 |
commit | e7f533cd5972d762e0544a38c74fce495a9d9d2f (patch) | |
tree | b77b1e2785c265243854ad599b8464e307f18fa2 /arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | |
parent | 31530e0b8a411398efde40edbec12a7cf262926e (diff) | |
download | u-boot-imx-e7f533cd5972d762e0544a38c74fce495a9d9d2f.zip u-boot-imx-e7f533cd5972d762e0544a38c74fce495a9d9d2f.tar.gz u-boot-imx-e7f533cd5972d762e0544a38c74fce495a9d9d2f.tar.bz2 |
powerpc/mpc85xx: modify erratum A007186
T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function has_errata_a007186
to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the sil has errata a007186, then run the errata code,
if not, doesn't run the code.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c index 8edf5bb..5cfae47 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c @@ -11,6 +11,7 @@ #include <asm/processor.h> #include <asm/fsl_law.h> #include <asm/errno.h> +#include <asm/fsl_errata.h> #include "fsl_corenet2_serdes.h" #ifdef CONFIG_SYS_FSL_SRDS_1 @@ -203,7 +204,7 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift) sel = (sfp_spfr0 >> FUSE_VAL_SHIFT) & FUSE_VAL_MASK; - if (sel == 0x01 || sel == 0x02) { + if (has_erratum_a007186() && (sel == 0x01 || sel == 0x02)) { for (pll_num = 0; pll_num < SRDS_MAX_BANK; pll_num++) { pll_status = in_be32(&srds_regs->bank[pll_num].pllcr0); debug("A007186: pll_num=%x pllcr0=%x\n", |