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| author | Wolfgang Denk <wd@denx.de> | 2011-10-21 23:48:46 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-10-21 23:48:46 +0200 |
| commit | 02aff558f4b68927c719a33bee8d13d325d105fb (patch) | |
| tree | 215757279d23a8984cad993679c6be20fe0d6831 /arch/powerpc/cpu/mpc85xx/fdt.c | |
| parent | f82c087e60fe1c59ace1c6f016eb89c5d3c3ae13 (diff) | |
| parent | 710308ee185b3087e474fb9b205f47613c65dda4 (diff) | |
| download | u-boot-imx-02aff558f4b68927c719a33bee8d13d325d105fb.zip u-boot-imx-02aff558f4b68927c719a33bee8d13d325d105fb.tar.gz u-boot-imx-02aff558f4b68927c719a33bee8d13d325d105fb.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
mpc85xx: Add inline GPIO acessor functions
powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)
powerpc/85xx: Fix P2020DS booting
powerpc/85xx: Update USB device tree status based on pin settings
fdt: Add new fdt_set_node_status & fdt_set_status_by_alias helpers
powerpc/85xx: Add support for RMan LIODN initialization
powerpc/85xx: Update device tree handling for SRIO
powerpc/85xx: Update setting of SRIO LIODNs
fm: Don't allow disabling of FM1-DTSEC1
fm-eth: Don't mark the MAC we use for MDIO as disabled in device tree
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/fdt.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/fdt.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 9d2d769..9d31568 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -537,6 +537,27 @@ void fdt_fixup_fman_firmware(void *blob) #define fdt_fixup_fman_firmware(x) #endif +#if defined(CONFIG_PPC_P4080) || defined(CONFIG_PPC_P3060) +static void fdt_fixup_usb(void *fdt) +{ + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 rcwsr11 = in_be32(&gur->rcwsr[11]); + int off; + + off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph"); + if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) != + FSL_CORENET_RCWSR11_EC1_FM1_USB1) + fdt_status_disabled(fdt, off); + + off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr"); + if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) != + FSL_CORENET_RCWSR11_EC2_USB2) + fdt_status_disabled(fdt, off); +} +#else +#define fdt_fixup_usb(x) +#endif + void ft_cpu_setup(void *blob, bd_t *bd) { int off; @@ -641,6 +662,8 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0", "clock_freq", gd->bus_clk, 1); + + fdt_fixup_usb(blob); } /* |