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authoryork <yorksun@freescale.com>2010-07-02 22:25:53 +0000
committerKumar Gala <galak@kernel.crashing.org>2010-07-26 13:16:09 -0500
commit5800e7ab32c200836e81ab2384817d93105561c5 (patch)
treea8022cbb490f4abbe4aba4480928abde59c70404 /arch/powerpc/cpu/mpc85xx/ddr-gen3.c
parent076bff8f4746baf7c83b96049d97e9dd4454dace (diff)
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powerpc/8xxx: Enable quad-rank DIMMs.
Previous code presumes each DIMM has up to two rank (chip select). Newer DDR controller supports up to four chip select on one DIMM. Signed-off-by: York Sun <yorksun@freescale.com>
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