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author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2014-04-25 16:31:22 +0800 |
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committer | York Sun <yorksun@freescale.com> | 2014-05-13 08:26:54 -0700 |
commit | 5122dfae5d3cd68e0b6e5e08597df91ba79770aa (patch) | |
tree | 7925d468a14f6ee9c4430c2be3cea771cddd3b35 /arch/powerpc/cpu/mpc85xx/cpu_init.c | |
parent | c665c473b605349b1c58890493255dd70e0b60fe (diff) | |
download | u-boot-imx-5122dfae5d3cd68e0b6e5e08597df91ba79770aa.zip u-boot-imx-5122dfae5d3cd68e0b6e5e08597df91ba79770aa.tar.gz u-boot-imx-5122dfae5d3cd68e0b6e5e08597df91ba79770aa.tar.bz2 |
powerpc/85xx: add T4080 SoC support
The T4080 SoC is a low-power version of the T4160.
T4080 combines 4 dual-threaded Power Architecture e6500
cores with single cluster and two memory complexes.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/cpu_init.c')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 36ef232..7e27464 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -462,10 +462,17 @@ __attribute__((weak, alias("__fsl_serdes__init"))) void fsl_serdes_init(void); int enable_cluster_l2(void) { int i = 0; - u32 cluster; + u32 cluster, svr = get_svr(); ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); struct ccsr_cluster_l2 __iomem *l2cache; + /* only the L2 of first cluster should be enabled as expected on T4080, + * but there is no EOC in the first cluster as HW sake, so return here + * to skip enabling L2 cache of the 2nd cluster. + */ + if (SVR_SOC_VER(svr) == SVR_T4080) + return 0; + cluster = in_be32(&gur->tp_cluster[i].lower); if (cluster & TP_CLUSTER_EOC) return 0; |