83xx/85xx/86xx: LBC register cleanup

Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers.  Merge
this into a single spot.

To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.

In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.

I have done a successful ppc build all and tested a board or two from
each processor family.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 4 insertions, 8 deletions

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 6f81fdf..9cf2ef9 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -257,8 +257,7 @@ void upmconfig (uint upm, uint * table, uint size)
 {
 	int i, mdr, mad, old_mad = 0;
 	volatile u32 *mxmr;
-	volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
-	volatile u32 *brp,*orp;
+	volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
 	volatile u8* dummy = NULL;
 	int upmmask;
 
@@ -281,12 +280,9 @@ void upmconfig (uint upm, uint * table, uint size)
 	}
 
 	/* Find the address for the dummy write transaction */
-	for (brp = &lbc->br0, orp = &lbc->or0, i = 0; i < 8;
-		 i++, brp += 2, orp += 2) {
-
-		/* Look for a valid BR with selected UPM */
-		if ((in_be32(brp) & (BR_V | BR_MSEL)) == (BR_V | upmmask)) {
-			dummy = (volatile u8*)(in_be32(brp) & BR_BA);
+	for (i = 0; i < 8; i++) {
+		if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | upmmask)) {
+			dummy = (volatile u8 *)(get_lbc_br(i) & BR_BA);
 			break;
 		}
 	}