summaryrefslogtreecommitdiff
path: root/arch/powerpc/cpu/mpc83xx
diff options
context:
space:
mode:
authorBecky Bruce <beckyb@kernel.crashing.org>2010-06-17 11:37:26 -0500
committerKumar Gala <galak@kernel.crashing.org>2010-07-16 10:55:09 -0500
commitf2d9a5da29eb539c2358615cad7f36e3450504fa (patch)
treecdeb2f245589ae2ea72fc58b72e73ff5243b3c13 /arch/powerpc/cpu/mpc83xx
parent199e262eb3c1b70553325c2010be0e28d9245460 (diff)
downloadu-boot-imx-f2d9a5da29eb539c2358615cad7f36e3450504fa.zip
u-boot-imx-f2d9a5da29eb539c2358615cad7f36e3450504fa.tar.gz
u-boot-imx-f2d9a5da29eb539c2358615cad7f36e3450504fa.tar.bz2
powerpc 83xx/85xx: Merge lbc upmconfig code
Each platform had its own version of the upmconfig, despite the init process being identical. Now that we have a spot for common lbc code, create a common upmconfig() there. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc83xx')
-rw-r--r--arch/powerpc/cpu/mpc83xx/cpu.c66
1 files changed, 0 insertions, 66 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index 86a24fd..6635109 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -126,72 +126,6 @@ int checkcpu(void)
return 0;
}
-
-/*
- * Program a UPM with the code supplied in the table.
- *
- * The 'dummy' variable is used to increment the MAD. 'dummy' is
- * supposed to be a pointer to the memory of the device being
- * programmed by the UPM. The data in the MDR is written into
- * memory and the MAD is incremented every time there's a write
- * to 'dummy'. Unfortunately, the current prototype for this
- * function doesn't allow for passing the address of this
- * device, and changing the prototype will break a number lots
- * of other code, so we need to use a round-about way of finding
- * the value for 'dummy'.
- *
- * The value can be extracted from the base address bits of the
- * Base Register (BR) associated with the specific UPM. To find
- * that BR, we need to scan all 8 BRs until we find the one that
- * has its MSEL bits matching the UPM we want. Once we know the
- * right BR, we can extract the base address bits from it.
- *
- * The MxMR and the BR and OR of the chosen bank should all be
- * configured before calling this function.
- *
- * Parameters:
- * upm: 0=UPMA, 1=UPMB, 2=UPMC
- * table: Pointer to an array of values to program
- * size: Number of elements in the array. Must be 64 or less.
- */
-void upmconfig (uint upm, uint *table, uint size)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile fsl_lbc_t *lbc = &immap->im_lbc;
- volatile uchar *dummy = NULL;
- const u32 msel = (upm + 4) << BR_MSEL_SHIFT; /* What the MSEL field in BRn should be */
- volatile u32 *mxmr = &lbc->mamr + upm; /* ptr to mamr, mbmr, or mcmr */
- uint i;
-
- /* Find the address for the dummy write transaction */
- for (i = 0; i < 8; i++) {
- if ((get_lbc_br(i) & BR_MSEL) == msel) {
- dummy = (uchar *) (get_lbc_br(i) & BR_BA);
- break;
- }
- }
-
- if (!dummy) {
- printf("Error: %s() could not find matching BR\n", __FUNCTION__);
- hang();
- }
-
- /* Set the OP field in the MxMR to "write" and the MAD field to 000000 */
- *mxmr = (*mxmr & 0xCFFFFFC0) | 0x10000000;
-
- for (i = 0; i < size; i++) {
- lbc->mdr = table[i];
- __asm__ __volatile__ ("sync");
- *dummy = 0; /* Write the value to memory and increment MAD */
- __asm__ __volatile__ ("sync");
- while(((*mxmr & 0x3f) != ((i + 1) & 0x3f)));
- }
-
- /* Set the OP field in the MxMR to "normal" and the MAD field to 000000 */
- *mxmr &= 0xCFFFFFC0;
-}
-
-
int
do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{