diff options
author | Simon Glass <sjg@chromium.org> | 2012-12-13 20:48:54 +0000 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2013-02-04 09:05:43 -0500 |
commit | fefb098b187caab34edc72df141125925c9bba62 (patch) | |
tree | e962092e6cacc356a79b3c20e94b6040c5d9d96b /arch/powerpc/cpu/mpc512x | |
parent | b28774966c933780e891998b472528ba0724b8e0 (diff) | |
download | u-boot-imx-fefb098b187caab34edc72df141125925c9bba62.zip u-boot-imx-fefb098b187caab34edc72df141125925c9bba62.tar.gz u-boot-imx-fefb098b187caab34edc72df141125925c9bba62.tar.bz2 |
ppc: Move mpc512x clocks to arch_global_data
Move ips_clk and csb_clk into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc512x')
-rw-r--r-- | arch/powerpc/cpu/mpc512x/cpu.c | 2 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc512x/i2c.c | 2 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc512x/ide.c | 2 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc512x/serial.c | 2 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc512x/speed.c | 15 |
5 files changed, 13 insertions, 10 deletions
diff --git a/arch/powerpc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c index a1a3bd4..641120f 100644 --- a/arch/powerpc/cpu/mpc512x/cpu.c +++ b/arch/powerpc/cpu/mpc512x/cpu.c @@ -68,7 +68,7 @@ int checkcpu (void) } printf ("at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n", strmhz(buf1, clock), - strmhz(buf2, gd->csb_clk), + strmhz(buf2, gd->arch.csb_clk), gd->reset_status & 0xffff); return 0; } diff --git a/arch/powerpc/cpu/mpc512x/i2c.c b/arch/powerpc/cpu/mpc512x/i2c.c index 0ea1280..59040f8 100644 --- a/arch/powerpc/cpu/mpc512x/i2c.c +++ b/arch/powerpc/cpu/mpc512x/i2c.c @@ -250,7 +250,7 @@ static int mpc_get_fdr (int speed) {126, 128} }; - ips = gd->ips_clk; + ips = gd->arch.ips_clk; for (i = 7; i >= 0; i--) { for (j = 7; j >= 0; j--) { scl = 2 * (scltap[j].scl2tap + diff --git a/arch/powerpc/cpu/mpc512x/ide.c b/arch/powerpc/cpu/mpc512x/ide.c index dd6b2f4..7a49673 100644 --- a/arch/powerpc/cpu/mpc512x/ide.c +++ b/arch/powerpc/cpu/mpc512x/ide.c @@ -100,7 +100,7 @@ int ide_preinit (void) ide_set_reset(0); /* Init timings : we use PIO mode 0 timings */ - t = 1000000000 / gd->ips_clk; /* period in ns */ + t = 1000000000 / gd->arch.ips_clk; /* period in ns */ cfg.bytes.field1 = 3; cfg.bytes.field2 = 3; cfg.bytes.field3 = (pio_specs.t1 + t) / t; diff --git a/arch/powerpc/cpu/mpc512x/serial.c b/arch/powerpc/cpu/mpc512x/serial.c index 58587fd..3afbe81 100644 --- a/arch/powerpc/cpu/mpc512x/serial.c +++ b/arch/powerpc/cpu/mpc512x/serial.c @@ -140,7 +140,7 @@ void serial_setbrg_dev(unsigned int idx) } /* calculate divisor for setting PSC CTUR and CTLR registers */ - baseclk = (gd->ips_clk + 8) / 16; + baseclk = (gd->arch.ips_clk + 8) / 16; div = (baseclk + (baudrate / 2)) / baudrate; out_8(&psc->ctur, (div >> 8) & 0xff); diff --git a/arch/powerpc/cpu/mpc512x/speed.c b/arch/powerpc/cpu/mpc512x/speed.c index 9d749f2..9a8f315 100644 --- a/arch/powerpc/cpu/mpc512x/speed.c +++ b/arch/powerpc/cpu/mpc512x/speed.c @@ -113,9 +113,9 @@ int get_clocks (void) pci_clk = 333333; } - gd->ips_clk = ips_clk; + gd->arch.ips_clk = ips_clk; gd->pci_clk = pci_clk; - gd->csb_clk = csb_clk; + gd->arch.csb_clk = csb_clk; gd->cpu_clk = core_clk; gd->bus_clk = csb_clk; return 0; @@ -128,7 +128,7 @@ int get_clocks (void) *********************************************/ ulong get_bus_freq (ulong dummy) { - return gd->csb_clk; + return gd->arch.csb_clk; } int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) @@ -137,10 +137,13 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) printf("Clock configuration:\n"); printf(" CPU: %-4s MHz\n", strmhz(buf, gd->cpu_clk)); - printf(" Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk)); - printf(" IPS Bus: %-4s MHz\n", strmhz(buf, gd->ips_clk)); + printf(" Coherent System Bus: %-4s MHz\n", + strmhz(buf, gd->arch.csb_clk)); + printf(" IPS Bus: %-4s MHz\n", + strmhz(buf, gd->arch.ips_clk)); printf(" PCI: %-4s MHz\n", strmhz(buf, gd->pci_clk)); - printf(" DDR: %-4s MHz\n", strmhz(buf, 2*gd->csb_clk)); + printf(" DDR: %-4s MHz\n", + strmhz(buf, 2 * gd->arch.csb_clk)); return 0; } |