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author | Wolfgang Denk <wd@denx.de> | 2010-04-27 23:02:12 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2010-04-27 23:02:12 +0200 |
commit | 8e98f5f70b269a77416a990b90ad8d853c5a0d73 (patch) | |
tree | ee7332a16533f59cdc111bdf8796179333aaede9 /arch/powerpc/cpu/mpc512x/fixed_sdram.c | |
parent | c303176aa0cf8c5fc38e7c2d5e181e89cca72ef6 (diff) | |
parent | 29fd7ceb3c1cb7ffaffce1047e806d1e85e3ab4b (diff) | |
download | u-boot-imx-8e98f5f70b269a77416a990b90ad8d853c5a0d73.zip u-boot-imx-8e98f5f70b269a77416a990b90ad8d853c5a0d73.tar.gz u-boot-imx-8e98f5f70b269a77416a990b90ad8d853c5a0d73.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx
Diffstat (limited to 'arch/powerpc/cpu/mpc512x/fixed_sdram.c')
-rw-r--r-- | arch/powerpc/cpu/mpc512x/fixed_sdram.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc512x/fixed_sdram.c b/arch/powerpc/cpu/mpc512x/fixed_sdram.c index 442b5fc..550cbd0 100644 --- a/arch/powerpc/cpu/mpc512x/fixed_sdram.c +++ b/arch/powerpc/cpu/mpc512x/fixed_sdram.c @@ -78,7 +78,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config, u32 *dram_init_seq, int seq_sz) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; + u32 msize = CONFIG_SYS_MAX_RAM_SIZE; u32 msize_log2 = __ilog2(msize); u32 i; @@ -91,7 +91,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config, } /* Initialize IO Control */ - out_be32(&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR); + out_be32(&im->io_ctrl.io_control_mem, CONFIG_SYS_IOCTRL_MUX_DDR); /* Initialize DDR Local Window */ out_be32(&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000); @@ -148,5 +148,10 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config, out_be32(&im->mddrc.ddr_time_config0, mddrc_config->ddr_time_config0); out_be32(&im->mddrc.ddr_sys_config, mddrc_config->ddr_sys_config); + msize = get_ram_size(CONFIG_SYS_DDR_BASE, CONFIG_SYS_MAX_RAM_SIZE); + /* Fix DDR Local Window for new size */ + out_be32(&im->sysconf.ddrlaw.ar, __ilog2(msize) - 1); + sync_law(&im->sysconf.ddrlaw.ar); + return msize; } |