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authorPaul Burton <paul.burton@imgtec.com>2015-01-29 01:28:02 +0000
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2015-01-29 12:55:01 +0100
commitdd7c72006e51f0d27e5cb1dcf60d5b9bf307565e (patch)
treea2db8dc572e96427919f6f1bae496c3abff8cd5e /arch/nds32/include/asm/macro.h
parentca4e833cd6409c72e5b13ee803a4f08381e6d160 (diff)
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MIPS: allow systems to skip loads during cache init
Current MIPS systems do not require that loads be performed to force the parity of cache lines, a simple invalidate by clearing the tag for each line will suffice. Thus this patch makes the loads & subsequent second invalidation conditional upon the CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD option, and defines that for existing mips32 targets. Exceptions are malta where this is known to be unnecessary, and qemu-mips where caches are not implemented. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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