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| author | Anson Huang <Anson.Huang@nxp.com> | 2016-05-08 22:29:57 +0800 |
|---|---|---|
| committer | zhang sanshan <b51434@freescale.com> | 2016-05-30 17:21:00 +0800 |
| commit | 9ad1502da08207f96104310c56d5b6cb71db0b13 (patch) | |
| tree | 3b87bb4ab94c57f9019c944f4d4c8895e4e4b06c /arch/mips | |
| parent | 78a9948f7edb52081a366dbb74b4df00f9876353 (diff) | |
| download | u-boot-imx-9ad1502da08207f96104310c56d5b6cb71db0b13.zip u-boot-imx-9ad1502da08207f96104310c56d5b6cb71db0b13.tar.gz u-boot-imx-9ad1502da08207f96104310c56d5b6cb71db0b13.tar.bz2 | |
MLK-12748-3 imx: adjust imx7d lpddr3 lpsr exit flow
On i.MX7D lpddr3, retention mode exit flow should restore
more registers to make sure the ddr controller and ddr phy
settings restored properly, otherwise, some of the boards
can NOT pass memtester after retention mode exited.
For LPSR mode, ddr resume flow is same as retention mode,
just adjust it accordingly.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/mips')
0 files changed, 0 insertions, 0 deletions