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author | Chen-Yu Tsai <wens@csie.org> | 2016-01-06 15:13:07 +0800 |
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committer | Hans de Goede <hdegoede@redhat.com> | 2016-01-26 16:20:05 +0100 |
commit | ed80584f3087f8d4da996cddd9807fc90f3de06c (patch) | |
tree | 774b96da536519157b0280342229fbdb4478a85d /arch/mips | |
parent | 5823664fb84612ef511136b66059710cccd71bed (diff) | |
download | u-boot-imx-ed80584f3087f8d4da996cddd9807fc90f3de06c.zip u-boot-imx-ed80584f3087f8d4da996cddd9807fc90f3de06c.tar.gz u-boot-imx-ed80584f3087f8d4da996cddd9807fc90f3de06c.tar.bz2 |
sunxi: Support H3 CCU security switches
H3's CCU includes some switches which disable non-secure access to some
of the more critical clock controls, such as MBUS, PLLs, and main
platform busses.
Configure them to enable non-secure access.
For now the only SoC that has this feature is the H3. For other
platforms just use a default (weak) empty function so things do
not break.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'arch/mips')
0 files changed, 0 insertions, 0 deletions