Merge branch 'master' of git://git.denx.de/u-boot-arm

15 files changed, 436 insertions, 380 deletions

diff --git a/arch/mips/config.mk b/arch/mips/config.mk
index de9140b..aaa94e8 100644
--- a/arch/mips/config.mk
+++ b/arch/mips/config.mk
@@ -65,4 +65,5 @@ PLATFORM_CPPFLAGS		+= -G 0 -mabicalls -fpic $(ENDIANNESS)
 PLATFORM_CPPFLAGS		+= -msoft-float
 PLATFORM_LDFLAGS		+= -G 0 -static -n -nostdlib $(ENDIANNESS)
 PLATFORM_RELFLAGS		+= -ffunction-sections -fdata-sections
-LDFLAGS_FINAL			+= --gc-sections
+LDFLAGS_FINAL			+= --gc-sections -pie
+OBJCFLAGS			+= --remove-section=.dynsym
diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk
index 481e984..7399701 100644
--- a/arch/mips/cpu/mips32/config.mk
+++ b/arch/mips/cpu/mips32/config.mk
@@ -30,5 +30,11 @@
 MIPSFLAGS := -march=mips32r2
 
 PLATFORM_CPPFLAGS += $(MIPSFLAGS)
+PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT
+ifdef CONFIG_SYS_BIG_ENDIAN
+PLATFORM_LDFLAGS  += -m elf32btsmip
+else
+PLATFORM_LDFLAGS  += -m elf32ltsmip
+endif
 
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T mips.lds
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 9c1b2f7..76abbaa 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -47,27 +47,16 @@
 	.set	pop
 	.endm
 
-	.macro	setup_c0_status_reset
-#ifdef CONFIG_64BIT
-	setup_c0_status ST0_KX 0
-#else
-	setup_c0_status 0 0
-#endif
-	.endm
-
-#define RVECENT(f,n) \
-   b f; nop
-#define XVECENT(f,bev) \
-   b f     ;           \
-   li k0,bev
-
 	.set noreorder
 
 	.globl _start
 	.text
 _start:
-	RVECENT(reset,0)			# U-boot entry point
-	RVECENT(reset,1)			# software reboot
+	/* U-boot entry point */
+	b	reset
+	 nop
+
+	.org 0x10
 #ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG
 	/*
 	 * Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to
@@ -77,141 +66,39 @@ _start:
 	 * device with correct parameters. This config option is board-specific.
 	 */
 	.word CONFIG_SYS_XWAY_EBU_BOOTCFG
-	.word 0x00000000
-#else
-	RVECENT(romReserved,2)
+	.word 0x0
 #endif
-	RVECENT(romReserved,3)
-	RVECENT(romReserved,4)
-	RVECENT(romReserved,5)
-	RVECENT(romReserved,6)
-	RVECENT(romReserved,7)
-	RVECENT(romReserved,8)
-	RVECENT(romReserved,9)
-	RVECENT(romReserved,10)
-	RVECENT(romReserved,11)
-	RVECENT(romReserved,12)
-	RVECENT(romReserved,13)
-	RVECENT(romReserved,14)
-	RVECENT(romReserved,15)
-	RVECENT(romReserved,16)
-	RVECENT(romReserved,17)
-	RVECENT(romReserved,18)
-	RVECENT(romReserved,19)
-	RVECENT(romReserved,20)
-	RVECENT(romReserved,21)
-	RVECENT(romReserved,22)
-	RVECENT(romReserved,23)
-	RVECENT(romReserved,24)
-	RVECENT(romReserved,25)
-	RVECENT(romReserved,26)
-	RVECENT(romReserved,27)
-	RVECENT(romReserved,28)
-	RVECENT(romReserved,29)
-	RVECENT(romReserved,30)
-	RVECENT(romReserved,31)
-	RVECENT(romReserved,32)
-	RVECENT(romReserved,33)
-	RVECENT(romReserved,34)
-	RVECENT(romReserved,35)
-	RVECENT(romReserved,36)
-	RVECENT(romReserved,37)
-	RVECENT(romReserved,38)
-	RVECENT(romReserved,39)
-	RVECENT(romReserved,40)
-	RVECENT(romReserved,41)
-	RVECENT(romReserved,42)
-	RVECENT(romReserved,43)
-	RVECENT(romReserved,44)
-	RVECENT(romReserved,45)
-	RVECENT(romReserved,46)
-	RVECENT(romReserved,47)
-	RVECENT(romReserved,48)
-	RVECENT(romReserved,49)
-	RVECENT(romReserved,50)
-	RVECENT(romReserved,51)
-	RVECENT(romReserved,52)
-	RVECENT(romReserved,53)
-	RVECENT(romReserved,54)
-	RVECENT(romReserved,55)
-	RVECENT(romReserved,56)
-	RVECENT(romReserved,57)
-	RVECENT(romReserved,58)
-	RVECENT(romReserved,59)
-	RVECENT(romReserved,60)
-	RVECENT(romReserved,61)
-	RVECENT(romReserved,62)
-	RVECENT(romReserved,63)
-	XVECENT(romExcHandle,0x200)	# bfc00200: R4000 tlbmiss vector
-	RVECENT(romReserved,65)
-	RVECENT(romReserved,66)
-	RVECENT(romReserved,67)
-	RVECENT(romReserved,68)
-	RVECENT(romReserved,69)
-	RVECENT(romReserved,70)
-	RVECENT(romReserved,71)
-	RVECENT(romReserved,72)
-	RVECENT(romReserved,73)
-	RVECENT(romReserved,74)
-	RVECENT(romReserved,75)
-	RVECENT(romReserved,76)
-	RVECENT(romReserved,77)
-	RVECENT(romReserved,78)
-	RVECENT(romReserved,79)
-	XVECENT(romExcHandle,0x280)	# bfc00280: R4000 xtlbmiss vector
-	RVECENT(romReserved,81)
-	RVECENT(romReserved,82)
-	RVECENT(romReserved,83)
-	RVECENT(romReserved,84)
-	RVECENT(romReserved,85)
-	RVECENT(romReserved,86)
-	RVECENT(romReserved,87)
-	RVECENT(romReserved,88)
-	RVECENT(romReserved,89)
-	RVECENT(romReserved,90)
-	RVECENT(romReserved,91)
-	RVECENT(romReserved,92)
-	RVECENT(romReserved,93)
-	RVECENT(romReserved,94)
-	RVECENT(romReserved,95)
-	XVECENT(romExcHandle,0x300)	# bfc00300: R4000 cache vector
-	RVECENT(romReserved,97)
-	RVECENT(romReserved,98)
-	RVECENT(romReserved,99)
-	RVECENT(romReserved,100)
-	RVECENT(romReserved,101)
-	RVECENT(romReserved,102)
-	RVECENT(romReserved,103)
-	RVECENT(romReserved,104)
-	RVECENT(romReserved,105)
-	RVECENT(romReserved,106)
-	RVECENT(romReserved,107)
-	RVECENT(romReserved,108)
-	RVECENT(romReserved,109)
-	RVECENT(romReserved,110)
-	RVECENT(romReserved,111)
-	XVECENT(romExcHandle,0x380)	# bfc00380: R4000 general vector
-	RVECENT(romReserved,113)
-	RVECENT(romReserved,114)
-	RVECENT(romReserved,115)
-	RVECENT(romReserved,116)
-	RVECENT(romReserved,116)
-	RVECENT(romReserved,118)
-	RVECENT(romReserved,119)
-	RVECENT(romReserved,120)
-	RVECENT(romReserved,121)
-	RVECENT(romReserved,122)
-	RVECENT(romReserved,123)
-	RVECENT(romReserved,124)
-	RVECENT(romReserved,125)
-	RVECENT(romReserved,126)
-	RVECENT(romReserved,127)
 
-	/*
-	 * We hope there are no more reserved vectors!
-	 * 128 * 8 == 1024 == 0x400
-	 * so this is address R_VEC+0x400 == 0xbfc00400
-	 */
+	.org 0x200
+	/* TLB refill, 32 bit task */
+1:	b	1b
+	 nop
+
+	.org 0x280
+	/* XTLB refill, 64 bit task */
+1:	b	1b
+	 nop
+
+	.org 0x300
+	/* Cache error exception */
+1:	b	1b
+	 nop
+
+	.org 0x380
+	/* General exception */
+1:	b	1b
+	 nop
+
+	.org 0x400
+	/* Catch interrupt exceptions */
+1:	b	1b
+	 nop
+
+	.org 0x480
+	/* EJTAG debug exception */
+1:	b	1b
+	 nop
+
 	.align 4
 reset:
 
@@ -222,7 +109,7 @@ reset:
 	/* WP(Watch Pending), SW0/1 should be cleared */
 	mtc0	zero, CP0_CAUSE
 
-	setup_c0_status_reset
+	setup_c0_status 0 0
 
 	/* Init Timer */
 	mtc0	zero, CP0_COUNT
@@ -258,8 +145,7 @@ reset:
 #endif
 
 	/* Set up temporary stack */
-	li	t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
-	la	sp, 0(t0)
+	li	sp, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
 
 	la	t9, board_init_f
 	jr	t9
@@ -280,58 +166,45 @@ reset:
 relocate_code:
 	move	sp, a0			# set new stack pointer
 
+	move	s0, a1			# save gd in s0
+	move	s2, a2			# save destination address in s2
+
 	li	t0, CONFIG_SYS_MONITOR_BASE
+	sub	s1, s2, t0		# s1 <-- relocation offset
+
 	la	t3, in_ram
-	lw	t2, -12(t3)		# t2 <-- uboot_end_data
+	lw	t2, -12(t3)		# t2 <-- __image_copy_end
 	move	t1, a2
-	move	s2, a2			# s2 <-- destination address
 
-	/*
-	 * Fix $gp:
-	 *
-	 * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
-	 */
-	move	t6, gp
-	sub	gp, CONFIG_SYS_MONITOR_BASE
-	add	gp, a2			# gp now adjusted
-	sub	s1, gp, t6		# s1 <-- relocation offset
+	add	gp, s1			# adjust gp
 
 	/*
 	 * t0 = source address
 	 * t1 = target address
 	 * t2 = source end address
 	 */
-
-	/*
-	 * Save destination address and size for later usage in flush_cache()
-	 */
-	move	s0, a1			# save gd in s0
-	move	a0, t1			# a0 <-- destination addr
-	sub	a1, t2, t0		# a1 <-- size
-
 1:
 	lw	t3, 0(t0)
 	sw	t3, 0(t1)
 	addu	t0, 4
-	ble	t0, t2, 1b
+	blt	t0, t2, 1b
 	 addu	t1, 4
 
 	/* If caches were enabled, we would have to flush them here. */
-
-	/* a0 & a1 are already set up for flush_cache(start, size) */
+	sub	a1, t1, s2		# a1 <-- size
 	la	t9, flush_cache
 	jalr	t9
-	 nop
+	 move	a0, s2			# a0 <-- destination address
 
 	/* Jump to where we've relocated ourselves */
 	addi	t0, s2, in_ram - _start
 	jr	t0
 	 nop
 
-	.word	_gp
+	.word	__rel_dyn_end
+	.word	__rel_dyn_start
+	.word	__image_copy_end
 	.word	_GLOBAL_OFFSET_TABLE_
-	.word	uboot_end_data
-	.word	uboot_end
 	.word	num_got_entries
 
 in_ram:
@@ -342,10 +215,8 @@ in_ram:
 	 * generated by GNU ld. Skip these reserved entries from relocation.
 	 */
 	lw	t3, -4(t0)		# t3 <-- num_got_entries
-	lw	t4, -16(t0)		# t4 <-- _GLOBAL_OFFSET_TABLE_
-	lw	t5, -20(t0)		# t5 <-- _gp
-	sub	t4, t5			# compute offset
-	add	t4, t4, gp		# t4 now holds relocated _G_O_T_
+	lw	t4, -8(t0)		# t4 <-- _GLOBAL_OFFSET_TABLE_
+	add	t4, s1			# t4 now holds relocated _G_O_T_
 	addi	t4, t4, 8		# skipping first two entries
 	li	t2, 2
 1:
@@ -358,17 +229,45 @@ in_ram:
 	blt	t2, t3, 1b
 	 addi	t4, 4
 
-	/* Clear BSS */
-	lw	t1, -12(t0)		# t1 <-- uboot_end_data
-	lw	t2, -8(t0)		# t2 <-- uboot_end
-	add	t1, s1			# adjust pointers
-	add	t2, s1
+	/* Update dynamic relocations */
+	lw	t1, -16(t0)		# t1 <-- __rel_dyn_start
+	lw	t2, -20(t0)		# t2 <-- __rel_dyn_end
+
+	b	2f			# skip first reserved entry
+	 addi	t1, 8
+
+1:
+	lw	t3, -4(t1)		# t3 <-- relocation info
+
+	sub	t3, 3
+	bnez	t3, 2f			# skip non R_MIPS_REL32 entries
+	 nop
+
+	lw	t3, -8(t1)		# t3 <-- location to fix up in FLASH
+
+	lw	t4, 0(t3)		# t4 <-- original pointer
+	add	t4, s1			# t4 <-- adjusted pointer
+
+	add	t3, s1			# t3 <-- location to fix up in RAM
+	sw	t4, 0(t3)
+
+2:
+	blt	t1, t2, 1b
+	 addi	t1, 8			# each rel.dyn entry is 8 bytes
+
+	/*
+	 * Clear BSS
+	 *
+	 * GOT is now relocated. Thus __bss_start and __bss_end can be
+	 * accessed directly via $gp.
+	 */
+	la	t1, __bss_start		# t1 <-- __bss_start
+	la	t2, __bss_end		# t2 <-- __bss_end
 
-	sub	t1, 4
 1:
-	addi	t1, 4
-	bltl	t1, t2, 1b
-	 sw	zero, 0(t1)
+	sw	zero, 0(t1)
+	blt	t1, t2, 1b
+	 addi	t1, 4
 
 	move	a0, s0			# a0 <-- gd
 	la	t9, board_init_r
@@ -376,10 +275,3 @@ in_ram:
 	 move	a1, s2
 
 	.end	relocate_code
-
-	/* Exception handlers */
-romReserved:
-	b	romReserved
-
-romExcHandle:
-	b	romExcHandle
diff --git a/arch/mips/cpu/mips64/start.S b/arch/mips/cpu/mips64/start.S
index 2b8d531..dc7ce07 100644
--- a/arch/mips/cpu/mips64/start.S
+++ b/arch/mips/cpu/mips64/start.S
@@ -31,6 +31,14 @@
 #define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
 #endif
 
+#ifdef CONFIG_SYS_LITTLE_ENDIAN
+#define MIPS64_R_INFO(ssym, r_type3, r_type2, r_type) \
+	(((r_type) << 24) | ((r_type2) << 16) | ((r_type3) << 8) | (ssym))
+#else
+#define MIPS64_R_INFO(ssym, r_type3, r_type2, r_type) \
+	((r_type) | ((r_type2) << 8) | ((r_type3) << 16) | (ssym) << 24)
+#endif
+
 	/*
 	 * For the moment disable interrupts, mark the kernel mode and
 	 * set ST0_KX so that the CPU does not spit fire when using
@@ -52,40 +60,40 @@
 	.globl _start
 	.text
 _start:
-	.org 0x000
+	/* U-boot entry point */
 	b	reset
 	 nop
-	.org 0x080
-	b	romReserved
-	 nop
-	.org 0x100
-	b	romReserved
-	 nop
-	.org 0x180
-	b	romReserved
-	 nop
+
 	.org 0x200
-	b	romReserved
+	/* TLB refill, 32 bit task */
+1:	b	1b
 	 nop
+
 	.org 0x280
-	b	romReserved
+	/* XTLB refill, 64 bit task */
+1:	b	1b
 	 nop
+
 	.org 0x300
-	b	romReserved
+	/* Cache error exception */
+1:	b	1b
 	 nop
+
 	.org 0x380
-	b	romReserved
+	/* General exception */
+1:	b	1b
+	 nop
+
+	.org 0x400
+	/* Catch interrupt exceptions */
+1:	b	1b
 	 nop
+
 	.org 0x480
-	b	romReserved
+	/* EJTAG debug exception */
+1:	b	1b
 	 nop
 
-	/*
-	 * We hope there are no more reserved vectors!
-	 * 128 * 8 == 1024 == 0x400
-	 * so this is address R_VEC+0x400 == 0xbfc00400
-	 */
-	.org 0x500
 	.align 4
 reset:
 
@@ -137,8 +145,7 @@ reset:
 #endif
 
 	/* Set up temporary stack */
-	dli	t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
-	dla	sp, 0(t0)
+	dli	sp, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
 
 	dla	t9, board_init_f
 	jr	t9
@@ -159,58 +166,45 @@ reset:
 relocate_code:
 	move	sp, a0			# set new stack pointer
 
+	move	s0, a1			# save gd in s0
+	move	s2, a2			# save destination address in s2
+
 	dli	t0, CONFIG_SYS_MONITOR_BASE
+	dsub	s1, s2, t0		# s1 <-- relocation offset
+
 	dla	t3, in_ram
-	ld	t2, -24(t3)		# t2 <-- uboot_end_data
+	ld	t2, -24(t3)		# t2 <-- __image_copy_end
 	move	t1, a2
-	move	s2, a2			# s2 <-- destination address
 
-	/*
-	 * Fix $gp:
-	 *
-	 * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
-	 */
-	move	t8, gp
-	dsub	gp, CONFIG_SYS_MONITOR_BASE
-	dadd	gp, a2			# gp now adjusted
-	dsub	s1, gp, t8		# s1 <-- relocation offset
+	dadd	gp, s1			# adjust gp
 
 	/*
 	 * t0 = source address
 	 * t1 = target address
 	 * t2 = source end address
 	 */
-
-	/*
-	 * Save destination address and size for dlater usage in flush_cache()
-	 */
-	move	s0, a1			# save gd in s0
-	move	a0, t1			# a0 <-- destination addr
-	dsub	a1, t2, t0		# a1 <-- size
-
 1:
 	lw	t3, 0(t0)
 	sw	t3, 0(t1)
 	daddu	t0, 4
-	ble	t0, t2, 1b
+	blt	t0, t2, 1b
 	 daddu	t1, 4
 
 	/* If caches were enabled, we would have to flush them here. */
-
-	/* a0 & a1 are already set up for flush_cache(start, size) */
+	dsub	a1, t1, s2		# a1 <-- size
 	dla	t9, flush_cache
 	jalr	t9
-	 nop
+	 move	a0, s2			# a0 <-- destination address
 
 	/* Jump to where we've relocated ourselves */
 	daddi	t0, s2, in_ram - _start
 	jr	t0
 	 nop
 
-	.dword	_gp
+	.dword	__rel_dyn_end
+	.dword	__rel_dyn_start
+	.dword	__image_copy_end
 	.dword	_GLOBAL_OFFSET_TABLE_
-	.dword	uboot_end_data
-	.dword	uboot_end
 	.dword	num_got_entries
 
 in_ram:
@@ -221,10 +215,8 @@ in_ram:
 	 * generated by GNU ld. Skip these reserved entries from relocation.
 	 */
 	ld	t3, -8(t0)		# t3 <-- num_got_entries
-	ld	t8, -32(t0)		# t8 <-- _GLOBAL_OFFSET_TABLE_
-	ld	t9, -40(t0)		# t9 <-- _gp
-	dsub	t8, t9			# compute offset
-	dadd	t8, t8, gp		# t8 now holds relocated _G_O_T_
+	ld	t8, -16(t0)		# t8 <-- _GLOBAL_OFFSET_TABLE_
+	dadd	t8, s1			# t8 now holds relocated _G_O_T_
 	daddi	t8, t8, 16		# skipping first two entries
 	dli	t2, 2
 1:
@@ -237,17 +229,45 @@ in_ram:
 	blt	t2, t3, 1b
 	 daddi	t8, 8
 
-	/* Clear BSS */
-	ld	t1, -24(t0)		# t1 <-- uboot_end_data
-	ld	t2, -16(t0)		# t2 <-- uboot_end
-	dadd	t1, s1			# adjust pointers
-	dadd	t2, s1
+	/* Update dynamic relocations */
+	ld	t1, -32(t0)		# t1 <-- __rel_dyn_start
+	ld	t2, -40(t0)		# t2 <-- __rel_dyn_end
+
+	b	2f			# skip first reserved entry
+	 daddi	t1, 16
 
-	dsub	t1, 8
 1:
-	daddi	t1, 8
-	bltl	t1, t2, 1b
-	 sd	zero, 0(t1)
+	lw	t8, -4(t1)		# t8 <-- relocation info
+
+	dli	t3, MIPS64_R_INFO(0x00, 0x00, 0x12, 0x03)
+	bne	t8, t3, 2f		# skip non R_MIPS_REL32 entries
+	 nop
+
+	ld	t3, -16(t1)		# t3 <-- location to fix up in FLASH
+
+	ld	t8, 0(t3)		# t8 <-- original pointer
+	dadd	t8, s1			# t8 <-- adjusted pointer
+
+	dadd	t3, s1			# t3 <-- location to fix up in RAM
+	sd	t8, 0(t3)
+
+2:
+	blt	t1, t2, 1b
+	 daddi	t1, 16			# each rel.dyn entry is 16 bytes
+
+	/*
+	 * Clear BSS
+	 *
+	 * GOT is now relocated. Thus __bss_start and __bss_end can be
+	 * accessed directly via $gp.
+	 */
+	dla	t1, __bss_start		# t1 <-- __bss_start
+	dla	t2, __bss_end		# t2 <-- __bss_end
+
+1:
+	sd	zero, 0(t1)
+	blt	t1, t2, 1b
+	 daddi	t1, 8
 
 	move	a0, s0			# a0 <-- gd
 	dla	t9, board_init_r
@@ -255,7 +275,3 @@ in_ram:
 	 move	a1, s2
 
 	.end	relocate_code
-
-	/* Exception handlers */
-romReserved:
-	b	romReserved
diff --git a/arch/mips/cpu/u-boot.lds b/arch/mips/cpu/u-boot.lds
new file mode 100644
index 0000000..10513ab
--- /dev/null
+++ b/arch/mips/cpu/u-boot.lds
@@ -0,0 +1,121 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk Engineering, <wd@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#if defined(CONFIG_64BIT)
+#define PTR_COUNT_SHIFT	3
+#else
+#define PTR_COUNT_SHIFT	2
+#endif
+
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text : {
+		*(.text*)
+	}
+
+	. = ALIGN(4);
+	.rodata : {
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	}
+
+	. = ALIGN(4);
+	.data : {
+		*(.data*)
+	}
+
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
+
+	.got : {
+		*(.got)
+	}
+
+	num_got_entries = SIZEOF(.got) >> PTR_COUNT_SHIFT;
+
+	. = ALIGN(4);
+	.sdata : {
+		*(.sdata*)
+	}
+
+	. = ALIGN(4);
+	.u_boot_list : {
+		#include <u-boot.lst>
+	}
+
+	. = ALIGN(4);
+	__image_copy_end = .;
+
+	.rel.dyn : {
+		__rel_dyn_start = .;
+		*(.rel.dyn)
+		__rel_dyn_end = .;
+	}
+
+	.deadcode : {
+		/*
+		 * Workaround for a binutils feature (or bug?).
+		 *
+		 * The GNU ld from binutils puts the dynamic relocation
+		 * entries into the .rel.dyn section. Sometimes it
+		 * allocates more dynamic relocation entries than it needs
+		 * and the unused slots are set to R_MIPS_NONE entries.
+		 *
+		 * However the size of the .rel.dyn section in the ELF
+		 * section header does not cover the unused entries, so
+		 * objcopy removes those during stripping.
+		 *
+		 * Create a small section here to avoid that.
+		 */
+		LONG(0xffffffff);
+	}
+
+	.dynsym : {
+		*(.dynsym)
+	}
+
+	.bss __rel_dyn_start (OVERLAY) : {
+		__bss_start = .;
+		*(.sbss.*)
+		*(.bss.*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end = .;
+	}
+
+	/DISCARD/ : {
+		*(.dynbss)
+		*(.dynstr)
+		*(.dynamic)
+		*(.interp)
+		*(.hash)
+		*(.gnu.*)
+		*(.plt)
+		*(.got.plt)
+		*(.rel.plt)
+	}
+}
diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk
index 1536746..cf5fa6a 100644
--- a/arch/mips/cpu/xburst/config.mk
+++ b/arch/mips/cpu/xburst/config.mk
@@ -21,5 +21,11 @@
 #
 
 PLATFORM_CPPFLAGS += -march=mips32
+PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT
+ifdef CONFIG_SYS_BIG_ENDIAN
+PLATFORM_LDFLAGS  += -m elf32btsmip
+else
+PLATFORM_LDFLAGS  += -m elf32ltsmip
+endif
 
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 -T mips.lds
diff --git a/arch/mips/cpu/xburst/jz4740.c b/arch/mips/cpu/xburst/jz4740.c
index c0b9817..b2d8f4d 100644
--- a/arch/mips/cpu/xburst/jz4740.c
+++ b/arch/mips/cpu/xburst/jz4740.c
@@ -201,10 +201,10 @@ void calc_clocks(void)
 	pllout = __cpm_get_pllout();
 
 	gd->cpu_clk = pllout / div[__cpm_get_cdiv()];
-	gd->sys_clk = pllout / div[__cpm_get_hdiv()];
-	gd->per_clk = pllout / div[__cpm_get_pdiv()];
+	gd->arch.sys_clk = pllout / div[__cpm_get_hdiv()];
+	gd->arch.per_clk = pllout / div[__cpm_get_pdiv()];
 	gd->mem_clk = pllout / div[__cpm_get_mdiv()];
-	gd->dev_clk = CONFIG_SYS_EXTAL;
+	gd->arch.dev_clk = CONFIG_SYS_EXTAL;
 }
 
 void rtc_init(void)
diff --git a/arch/mips/cpu/xburst/start.S b/arch/mips/cpu/xburst/start.S
index 3a8280c..d2c064b 100644
--- a/arch/mips/cpu/xburst/start.S
+++ b/arch/mips/cpu/xburst/start.S
@@ -64,19 +64,13 @@ relocate_code:
 	move	sp, a0			# set new stack pointer
 
 	li	t0, CONFIG_SYS_MONITOR_BASE
+	sub	t6, a2, t0		# t6 <-- relocation offset
+
 	la	t3, in_ram
-	lw	t2, -12(t3)		# t2 <-- uboot_end_data
+	lw	t2, -12(t3)		# t2 <-- __image_copy_end
 	move	t1, a2
 
-	/*
-	 * Fix $gp:
-	 *
-	 * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
-	 */
-	move	t6, gp
-	sub	gp, CONFIG_SYS_MONITOR_BASE
-	add	gp, a2			# gp now adjusted
-	sub	t6, gp, t6		# t6 <-- relocation offset
+	add	gp, t6			# adjust gp
 
 	/*
 	 * t0 = source address
@@ -87,7 +81,7 @@ relocate_code:
 	lw	t3, 0(t0)
 	sw	t3, 0(t1)
 	addu	t0, 4
-	ble	t0, t2, 1b
+	blt	t0, t2, 1b
 	 addu	t1, 4
 
 	/* If caches were enabled, we would have to flush them here. */
@@ -122,10 +116,10 @@ relocate_code:
 	jr	t0
 	 nop
 
-	.word	_gp
+	.word	__rel_dyn_end
+	.word	__rel_dyn_start
+	.word	__image_copy_end
 	.word	_GLOBAL_OFFSET_TABLE_
-	.word	uboot_end_data
-	.word	uboot_end
 	.word	num_got_entries
 
 in_ram:
@@ -136,10 +130,8 @@ in_ram:
 	 * generated by GNU ld. Skip these reserved entries from relocation.
 	 */
 	lw	t3, -4(t0)		# t3 <-- num_got_entries
-	lw	t4, -16(t0)		# t4 <-- _GLOBAL_OFFSET_TABLE_
-	lw	t5, -20(t0)		# t5 <-- _gp
-	sub	t4, t5			# compute offset
-	add	t4, t4, gp		# t4 now holds relocated _G_O_T_
+	lw	t4, -8(t0)		# t4 <-- _GLOBAL_OFFSET_TABLE_
+	add	t4, t6			# t4 now holds relocated _G_O_T_
 	addi	t4, t4, 8		# skipping first two entries
 	li	t2, 2
 1:
@@ -152,16 +144,45 @@ in_ram:
 	blt	t2, t3, 1b
 	 addi	t4, 4
 
-	/* Clear BSS */
-	lw	t1, -12(t0)		# t1 <-- uboot_end_data
-	lw	t2, -8(t0)		# t2 <-- uboot_end
-	add	t1, t6			# adjust pointers
-	add	t2, t6
+	/* Update dynamic relocations */
+	lw	t1, -16(t0)		# t1 <-- __rel_dyn_start
+	lw	t2, -20(t0)		# t2 <-- __rel_dyn_end
+
+	b	2f			# skip first reserved entry
+	 addi	t1, 8
+
+1:
+	lw	t3, -4(t1)		# t3 <-- relocation info
+
+	sub	t3, 3
+	bnez	t3, 2f			# skip non R_MIPS_REL32 entries
+	 nop
+
+	lw	t3, -8(t1)		# t3 <-- location to fix up in FLASH
+
+	lw	t4, 0(t3)		# t4 <-- original pointer
+	add	t4, t6			# t4 <-- adjusted pointer
+
+	add	t3, t6			# t3 <-- location to fix up in RAM
+	sw	t4, 0(t3)
+
+2:
+	blt	t1, t2, 1b
+	 addi	t1, 8			# each rel.dyn entry is 8 bytes
+
+	/*
+	 * Clear BSS
+	 *
+	 * GOT is now relocated. Thus __bss_start and __bss_end can be
+	 * accessed directly via $gp.
+	 */
+	la	t1, __bss_start		# t1 <-- __bss_start
+	la	t2, __bss_end		# t2 <-- __bss_end
 
-	sub	t1, 4
-1:	addi	t1, 4
-	bltl	t1, t2, 1b
-	 sw	zero, 0(t1)
+1:
+	sw	zero, 0(t1)
+	blt	t1, t2, 1b
+	 addi	t1, 4
 
 	move	a0, a1			# a0 <-- gd
 	la	t9, board_init_r
diff --git a/arch/mips/cpu/xburst/timer.c b/arch/mips/cpu/xburst/timer.c
index b6b3855..8c33d3c 100644
--- a/arch/mips/cpu/xburst/timer.c
+++ b/arch/mips/cpu/xburst/timer.c
@@ -34,24 +34,24 @@ static struct jz4740_tcu *tcu = (struct jz4740_tcu *)JZ4740_TCU_BASE;
 void reset_timer_masked(void)
 {
 	/* reset time */
-	gd->lastinc = readl(&tcu->tcnt0);
-	gd->tbl = 0;
+	gd->arch.lastinc = readl(&tcu->tcnt0);
+	gd->arch.tbl = 0;
 }
 
 ulong get_timer_masked(void)
 {
 	ulong now = readl(&tcu->tcnt0);
 
-	if (gd->lastinc <= now)
-		gd->tbl += now - gd->lastinc; /* normal mode */
+	if (gd->arch.lastinc <= now)
+		gd->arch.tbl += now - gd->arch.lastinc; /* normal mode */
 	else {
 		/* we have an overflow ... */
-		gd->tbl += TIMER_FDATA + now - gd->lastinc;
+		gd->arch.tbl += TIMER_FDATA + now - gd->arch.lastinc;
 	}
 
-	gd->lastinc = now;
+	gd->arch.lastinc = now;
 
-	return gd->tbl;
+	return gd->arch.tbl;
 }
 
 void udelay_masked(unsigned long usec)
@@ -94,8 +94,8 @@ int timer_init(void)
 	writel(1 << TIMER_CHAN, &tcu->tscr); /* enable timer clock */
 	writeb(1 << TIMER_CHAN, &tcu->tesr); /* start counting up */
 
-	gd->lastinc = 0;
-	gd->tbl = 0;
+	gd->arch.lastinc = 0;
+	gd->arch.tbl = 0;
 
 	return 0;
 }
@@ -112,7 +112,7 @@ ulong get_timer(ulong base)
 
 void set_timer(ulong t)
 {
-	gd->tbl = t;
+	gd->arch.tbl = t;
 }
 
 void __udelay(unsigned long usec)
diff --git a/arch/mips/include/asm/config.h b/arch/mips/include/asm/config.h
index 02fbfb3..049c44e 100644
--- a/arch/mips/include/asm/config.h
+++ b/arch/mips/include/asm/config.h
@@ -21,6 +21,4 @@
 #ifndef _ASM_CONFIG_H_
 #define _ASM_CONFIG_H_
 
-#define CONFIG_NEEDS_MANUAL_RELOC
-
 #endif
diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h
index a735a8a..f912428 100644
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -26,42 +26,19 @@
 
 #include <asm/regdef.h>
 
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedef	struct	global_data {
-	bd_t		*bd;
-	unsigned long	flags;
+/* Architecture-specific global data */
+struct arch_global_data {
 #ifdef CONFIG_JZSOC
 	/* There are other clocks in the jz4740 */
-	unsigned long	cpu_clk;	/* CPU core clock */
-	unsigned long	sys_clk;	/* System bus clock */
-	unsigned long	per_clk;	/* Peripheral bus clock */
-	unsigned long	mem_clk;	/* Memory bus clock */
-	unsigned long	dev_clk;	/* Device clock */
-	/* "static data" needed by most of timer.c */
-	unsigned long	tbl;
-	unsigned long	lastinc;
-#endif
-	unsigned int	baudrate;
-	unsigned long	have_console;	/* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
-	unsigned long	precon_buf_idx;	/* Pre-Console buffer index */
+	unsigned long per_clk;	/* Peripheral bus clock */
+	unsigned long dev_clk;	/* Device clock */
+	unsigned long sys_clk;
+	unsigned long tbl;
+	unsigned long lastinc;
 #endif
-	phys_size_t	ram_size;	/* RAM size */
-	unsigned long	reloc_off;	/* Relocation Offset */
-	unsigned long	env_addr;	/* Address  of Environment struct */
-	unsigned long	env_valid;	/* Checksum of Environment valid? */
-	void		**jt;		/* jump table */
-	char		env_buf[32];	/* buffer for getenv() before reloc. */
-} gd_t;
+};
 
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
 
 #define DECLARE_GLOBAL_DATA_PTR     register volatile gd_t *gd asm ("k0")
 
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 80eab75..3864c80 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -254,7 +254,7 @@ out:
  */
 
 #define __OUT1(s) \
-extern inline void __out##s(unsigned int value, unsigned int port) {
+static inline void __out##s(unsigned int value, unsigned int port) {
 
 #define __OUT2(m) \
 __asm__ __volatile__ ("s" #m "\t%0,%1(%2)"
@@ -268,7 +268,7 @@ __OUT1(s##c_p) __OUT2(m) : : "r" (__ioswab##w(value)), "ir" (port), "r" (mips_io
 	SLOW_DOWN_IO; }
 
 #define __IN1(t,s) \
-extern __inline__ t __in##s(unsigned int port) { t _v;
+static inline t __in##s(unsigned int port) { t _v;
 
 /*
  * Required nops will be inserted by the assembler
@@ -283,7 +283,7 @@ __IN1(t,s##_p) __IN2(m) : "=r" (_v) : "i" (0), "r" (mips_io_port_base+port)); SL
 __IN1(t,s##c_p) __IN2(m) : "=r" (_v) : "ir" (port), "r" (mips_io_port_base)); SLOW_DOWN_IO; return __ioswab##w(_v); }
 
 #define __INS1(s) \
-extern inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
+static inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
 
 #define __INS2(m) \
 if (count) \
@@ -311,7 +311,7 @@ __INS1(s##c) __INS2(m) \
 	: "$1");}
 
 #define __OUTS1(s) \
-extern inline void __outs##s(unsigned int port, const void * addr, unsigned long count) {
+static inline void __outs##s(unsigned int port, const void * addr, unsigned long count) {
 
 #define __OUTS2(m) \
 if (count) \
diff --git a/arch/mips/include/asm/u-boot-mips.h b/arch/mips/include/asm/u-boot-mips.h
index 6f26dfa..a483166 100644
--- a/arch/mips/include/asm/u-boot-mips.h
+++ b/arch/mips/include/asm/u-boot-mips.h
@@ -5,7 +5,22 @@
  * Copyright (C) 2003 Wolfgang Denk, DENX Software Engineering, wd@denx.de
  */
 
-extern ulong uboot_end_data;
-extern ulong uboot_end;
+static inline unsigned long bss_start(void)
+{
+	extern ulong __bss_start;
+	return (unsigned long) &__bss_start;
+}
+
+static inline unsigned long bss_end(void)
+{
+	extern ulong __bss_end;
+	return (unsigned long) &__bss_end;
+}
+
+static inline unsigned long image_copy_end(void)
+{
+	extern ulong __image_copy_end;
+	return (unsigned long) &__image_copy_end;
+}
 
 extern int incaip_set_cpuclk(void);
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index d79e183..f19f198 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -143,7 +143,7 @@ void board_init_f(ulong bootflag)
 	gd_t gd_data, *id;
 	bd_t *bd;
 	init_fnc_t **init_fnc_ptr;
-	ulong addr, addr_sp, len = (ulong)&uboot_end - CONFIG_SYS_MONITOR_BASE;
+	ulong addr, addr_sp, len;
 	ulong *s;
 
 	/* Pointer is writable since we allocated a register for it.
@@ -176,6 +176,7 @@ void board_init_f(ulong bootflag)
 	/* Reserve memory for U-Boot code, data & bss
 	 * round down to next 16 kB limit
 	 */
+	len = bss_end() - CONFIG_SYS_MONITOR_BASE;
 	addr -= len;
 	addr &= ~(16 * 1024 - 1);
 
@@ -249,9 +250,6 @@ void board_init_r(gd_t *id, ulong dest_addr)
 #ifndef CONFIG_SYS_NO_FLASH
 	ulong size;
 #endif
-#ifndef CONFIG_ENV_IS_NOWHERE
-	extern char *env_name_spec;
-#endif
 	bd_t *bd;
 
 	gd = id;
@@ -261,29 +259,15 @@ void board_init_r(gd_t *id, ulong dest_addr)
 
 	gd->reloc_off = dest_addr - CONFIG_SYS_MONITOR_BASE;
 
-	monitor_flash_len = (ulong)&uboot_end_data - dest_addr;
+	monitor_flash_len = image_copy_end() - dest_addr;
 
 	serial_initialize();
 
-#if defined(CONFIG_NEEDS_MANUAL_RELOC)
-	/*
-	 * We have to relocate the command table manually
-	 */
-	fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
-			ll_entry_count(cmd_tbl_t, cmd));
-#endif /* defined(CONFIG_NEEDS_MANUAL_RELOC) */
-
-	/* there are some other pointer constants we must deal with */
-#ifndef CONFIG_ENV_IS_NOWHERE
-	env_name_spec += gd->reloc_off;
-#endif
-
 	bd = gd->bd;
 
 	/* The Malloc area is immediately below the monitor copy in DRAM */
 	mem_malloc_init(CONFIG_SYS_MONITOR_BASE + gd->reloc_off -
 			TOTAL_MALLOC_LEN, TOTAL_MALLOC_LEN);
-	malloc_bin_reloc();
 
 #ifndef CONFIG_SYS_NO_FLASH
 	/* configure available FLASH banks */
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 608c1a7..a36154a 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -43,27 +43,12 @@ static int linux_env_idx;
 static void linux_params_init(ulong start, char *commandline);
 static void linux_env_set(char *env_name, char *env_val);
 
-int do_bootm_linux(int flag, int argc, char * const argv[],
-			bootm_headers_t *images)
+static void boot_prep_linux(bootm_headers_t *images)
 {
-	void (*theKernel) (int, char **, char **, int *);
 	char *commandline = getenv("bootargs");
 	char env_buf[12];
 	char *cp;
 
-	if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
-		return 1;
-
-	/* find kernel entry point */
-	theKernel = (void (*)(int, char **, char **, int *))images->ep;
-
-	bootstage_mark(BOOTSTAGE_ID_RUN_OS);
-
-#ifdef DEBUG
-	printf("## Transferring control to Linux (at address %08lx) ...\n",
-		(ulong) theKernel);
-#endif
-
 	linux_params_init(UNCACHED_SDRAM(gd->bd->bi_boot_params), commandline);
 
 #ifdef CONFIG_MEMSIZE_IN_BYTES
@@ -96,11 +81,45 @@ int do_bootm_linux(int flag, int argc, char * const argv[],
 	cp = getenv("eth1addr");
 	if (cp)
 		linux_env_set("eth1addr", cp);
+}
+
+static void boot_jump_linux(bootm_headers_t *images)
+{
+	void (*theKernel) (int, char **, char **, int *);
+
+	/* find kernel entry point */
+	theKernel = (void (*)(int, char **, char **, int *))images->ep;
+
+	debug("## Transferring control to Linux (at address %08lx) ...\n",
+		(ulong) theKernel);
+
+	bootstage_mark(BOOTSTAGE_ID_RUN_OS);
 
 	/* we assume that the kernel is in place */
 	printf("\nStarting kernel ...\n\n");
 
 	theKernel(linux_argc, linux_argv, linux_env, 0);
+}
+
+int do_bootm_linux(int flag, int argc, char * const argv[],
+			bootm_headers_t *images)
+{
+	/* No need for those on MIPS */
+	if (flag & BOOTM_STATE_OS_BD_T || flag & BOOTM_STATE_OS_CMDLINE)
+		return -1;
+
+	if (flag & BOOTM_STATE_OS_PREP) {
+		boot_prep_linux(images);
+		return 0;
+	}
+
+	if (flag & BOOTM_STATE_OS_GO) {
+		boot_jump_linux(images);
+		return 0;
+	}
+
+	boot_prep_linux(images);
+	boot_jump_linux(images);
 
 	/* does not return */
 	return 1;