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| author | Gabor Juhos <juhosg@openwrt.org> | 2013-01-24 06:27:55 +0000 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2013-01-27 16:40:15 +0100 |
| commit | 67d80c9f97f1b73d227f64efebf204221a611a70 (patch) | |
| tree | a6fa10d0f6eb01fa665a59ebda68366b68eaed82 /arch/mips/lib/ashldi3.c | |
| parent | 248fe03f53772a61bb7355a4e45cd055dfdcf7b2 (diff) | |
| download | u-boot-imx-67d80c9f97f1b73d227f64efebf204221a611a70.zip u-boot-imx-67d80c9f97f1b73d227f64efebf204221a611a70.tar.gz u-boot-imx-67d80c9f97f1b73d227f64efebf204221a611a70.tar.bz2 | |
MIPS: start.S: don't save flush_cache parameters in advance
Saving the parameters in advance unnecessarily complicates
the code. The destination address is already saved in the
's2' register, and that register is not clobbered by the
copy loop. The size of the copied data can be computed
after the copy loop is done.
Change the code to compute the size parameter right
before calling flush_cache, and set the destination
address parameter in the delay slot of the actuall
call.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Diffstat (limited to 'arch/mips/lib/ashldi3.c')
0 files changed, 0 insertions, 0 deletions