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author | Paul Burton <paul.burton@imgtec.com> | 2016-05-17 07:43:28 +0100 |
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committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-05-26 01:34:13 +0200 |
commit | 6242aa137427f6da6ca47e7a8c9a9f78ad63e00d (patch) | |
tree | 25366b785c6fd657a203b0b51e146b4a21d92088 /arch/mips/dts/mti,malta.dts | |
parent | 2e7eb12e5c81dedaff12b0cea2341dc681d8c726 (diff) | |
download | u-boot-imx-6242aa137427f6da6ca47e7a8c9a9f78ad63e00d.zip u-boot-imx-6242aa137427f6da6ca47e7a8c9a9f78ad63e00d.tar.gz u-boot-imx-6242aa137427f6da6ca47e7a8c9a9f78ad63e00d.tar.bz2 |
malta: Use device model & tree for UART
Make use of device model & device tree to probe the UART driver. This is
the initial step in bringing Malta up to date with driver model, and
allows for cleaner handling of the different I/O addresses for different
system controllers by specifying the ISA bus address instead of a
translated memory address.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch/mips/dts/mti,malta.dts')
-rw-r--r-- | arch/mips/dts/mti,malta.dts | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/mips/dts/mti,malta.dts b/arch/mips/dts/mti,malta.dts new file mode 100644 index 0000000..d339229 --- /dev/null +++ b/arch/mips/dts/mti,malta.dts @@ -0,0 +1,32 @@ +/dts-v1/; + +/memreserve/ 0x00000000 0x00001000; /* Exception vectors */ +/memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */ + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mti,malta"; + + chosen { + stdout-path = &uart0; + }; + + isa@0 { + compatible = "isa"; + #address-cells = <2>; + #size-cells = <1>; + ranges = <1 0 0 0x1000>; + + uart0: serial@3f8 { + compatible = "ns16550a"; + + reg = <1 0x3f8 0x40>; + reg-shift = <0>; + + clock-frequency = <1843200>; + + u-boot,dm-pre-reloc; + }; + }; +}; |