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authorDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2013-02-12 22:22:12 +0100
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2013-02-12 22:22:12 +0100
commit4dc7412afa4fe47a02805525e415656d67764839 (patch)
tree93330cfbeb64967b1738e41529cc486eca90c85c /arch/mips/cpu/mips32
parent97b920dab1e4fd9a05ff9dccc7853d588c73ae19 (diff)
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MIPS: start.S: remove obsolete 64 bit handling in setup_c0_status
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch/mips/cpu/mips32')
-rw-r--r--arch/mips/cpu/mips32/start.S10
1 files changed, 1 insertions, 9 deletions
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 51ce914..65acf7d 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -47,14 +47,6 @@
.set pop
.endm
- .macro setup_c0_status_reset
-#ifdef CONFIG_64BIT
- setup_c0_status ST0_KX 0
-#else
- setup_c0_status 0 0
-#endif
- .endm
-
#define RVECENT(f,n) \
b f; nop
#define XVECENT(f,bev) \
@@ -222,7 +214,7 @@ reset:
/* WP(Watch Pending), SW0/1 should be cleared */
mtc0 zero, CP0_CAUSE
- setup_c0_status_reset
+ setup_c0_status 0 0
/* Init Timer */
mtc0 zero, CP0_COUNT