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authorGabor Juhos <juhosg@openwrt.org>2013-02-12 22:22:13 +0100
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2013-02-12 22:22:13 +0100
commit04380c651a2ff0d1495822321d2b7668dcd02537 (patch)
treefd763e5b4f62d349cbcfde50e5e24292f9a1a18f /arch/mips/cpu/mips32
parent0ba8926e08bdabba681384ba3ea8476eda68c141 (diff)
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MIPS: add dynamic relocation support
The code handles relocation entries with the following relocation types only: mips32: R_MIPS_REL32 mips64: R_MIPS_REL+R_MIPS_64 xburst: R_MIPS_REL32 Other relocation entries are skipped without processing. The code must be extended if other relocation types must be supported. Add -pie to LDFLAGS_FINAL to generate the .rel.dyn fixup table, which will be applied to the relocated image before transferring control to it. The CONFIG_NEEDS_MANUAL_RELOC is not needed after the patch, so remove that as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch/mips/cpu/mips32')
-rw-r--r--arch/mips/cpu/mips32/start.S28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 649c0bb..76abbaa 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -201,6 +201,8 @@ relocate_code:
jr t0
nop
+ .word __rel_dyn_end
+ .word __rel_dyn_start
.word __image_copy_end
.word _GLOBAL_OFFSET_TABLE_
.word num_got_entries
@@ -227,6 +229,32 @@ in_ram:
blt t2, t3, 1b
addi t4, 4
+ /* Update dynamic relocations */
+ lw t1, -16(t0) # t1 <-- __rel_dyn_start
+ lw t2, -20(t0) # t2 <-- __rel_dyn_end
+
+ b 2f # skip first reserved entry
+ addi t1, 8
+
+1:
+ lw t3, -4(t1) # t3 <-- relocation info
+
+ sub t3, 3
+ bnez t3, 2f # skip non R_MIPS_REL32 entries
+ nop
+
+ lw t3, -8(t1) # t3 <-- location to fix up in FLASH
+
+ lw t4, 0(t3) # t4 <-- original pointer
+ add t4, s1 # t4 <-- adjusted pointer
+
+ add t3, s1 # t3 <-- location to fix up in RAM
+ sw t4, 0(t3)
+
+2:
+ blt t1, t2, 1b
+ addi t1, 8 # each rel.dyn entry is 8 bytes
+
/*
* Clear BSS
*