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author | Tom Rini <trini@ti.com> | 2012-11-09 08:47:25 -0700 |
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committer | Tom Rini <trini@ti.com> | 2012-11-09 08:47:25 -0700 |
commit | 59852d03867108217fe88e3bfc3e1e9cedfe63c5 (patch) | |
tree | 22eef109c0ce8eb99d80a5be21fab2d19f5b787a /arch/microblaze/include | |
parent | 22b6fcb50d06ee281a338e78f8d0a7c9ddee8629 (diff) | |
parent | b3e5cd17f6e180642efafb20bcda948c3cbcff10 (diff) | |
download | u-boot-imx-59852d03867108217fe88e3bfc3e1e9cedfe63c5.zip u-boot-imx-59852d03867108217fe88e3bfc3e1e9cedfe63c5.tar.gz u-boot-imx-59852d03867108217fe88e3bfc3e1e9cedfe63c5.tar.bz2 |
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Diffstat (limited to 'arch/microblaze/include')
-rw-r--r-- | arch/microblaze/include/asm/bitops.h | 3 | ||||
-rw-r--r-- | arch/microblaze/include/asm/byteorder.h | 23 | ||||
-rw-r--r-- | arch/microblaze/include/asm/posix_types.h | 3 |
3 files changed, 2 insertions, 27 deletions
diff --git a/arch/microblaze/include/asm/bitops.h b/arch/microblaze/include/asm/bitops.h index e8c835f..eafa2b5 100644 --- a/arch/microblaze/include/asm/bitops.h +++ b/arch/microblaze/include/asm/bitops.h @@ -319,7 +319,8 @@ extern __inline__ int ext2_test_bit(int nr, const volatile void * addr) #define ext2_find_first_zero_bit(addr, size) \ ext2_find_next_zero_bit((addr), (size), 0) -extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) +static inline unsigned long ext2_find_next_zero_bit(void *addr, + unsigned long size, unsigned long offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; diff --git a/arch/microblaze/include/asm/byteorder.h b/arch/microblaze/include/asm/byteorder.h index b2757a4..f3a471d 100644 --- a/arch/microblaze/include/asm/byteorder.h +++ b/arch/microblaze/include/asm/byteorder.h @@ -20,29 +20,6 @@ #ifdef __GNUC__ -/* This is effectively a dupe of the arch-independent byteswap - code in include/linux/byteorder/swab.h, however we force a cast - of the result up to 32 bits. This in turn forces the compiler - to explicitly clear the high 16 bits, which it wasn't doing otherwise. - - I think this is a symptom of a bug in mb-gcc. JW 20040303 -*/ - - -static __inline__ __u16 ___arch__swab16 (__u16 half_word) -{ - /* 32 bit temp to cast result, forcing clearing of high word */ - __u32 temp; - - temp = ((half_word & 0x00FFU) << 8) | ((half_word & 0xFF00U) >> 8); - - return (__u16) temp; -} - -#define __arch__swab16(x) ___arch__swab16(x) - -/* Microblaze has no arch-specific endian conversion insns */ - #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) # define __BYTEORDER_HAS_U64__ # define __SWAB_64_THRU_32__ diff --git a/arch/microblaze/include/asm/posix_types.h b/arch/microblaze/include/asm/posix_types.h index 9a2cc66..38dc5aa 100644 --- a/arch/microblaze/include/asm/posix_types.h +++ b/arch/microblaze/include/asm/posix_types.h @@ -16,9 +16,6 @@ #ifndef __MICROBLAZE_POSIX_TYPES_H__ #define __MICROBLAZE_POSIX_TYPES_H__ -#include <asm/bitops.h> - - typedef unsigned int __kernel_dev_t; typedef unsigned long __kernel_ino_t; typedef unsigned long long __kernel_ino64_t; |