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author | Alison Wang <b18965@freescale.com> | 2012-10-18 19:25:51 +0000 |
---|---|---|
committer | jason <jason@jason-ThinkPad-T61.(none)> | 2012-10-24 22:27:46 +0800 |
commit | 45370e1836dc0a7ac8e1d4828924e971d01fd92a (patch) | |
tree | 08ea830b2548a56c2bc60e0b0fdf332fa45df08a /arch/m68k/include/asm/cache.h | |
parent | 7adbd11e78518c21b4ea363b8a74b224c8ae8967 (diff) | |
download | u-boot-imx-45370e1836dc0a7ac8e1d4828924e971d01fd92a.zip u-boot-imx-45370e1836dc0a7ac8e1d4828924e971d01fd92a.tar.gz u-boot-imx-45370e1836dc0a7ac8e1d4828924e971d01fd92a.tar.bz2 |
ColdFire: Add MCF5441x CPU support
Add MCF5441x CPU support.
The MCF5441x devices are a family of highly-integrated 32-bit
microprocessors based on the Version 4m ColdFire microarchitecture,
comprising of the V4 integer core, memory management unit(MMU) and
enchanced multiply-accumulate unit(EMAC).
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
Diffstat (limited to 'arch/m68k/include/asm/cache.h')
-rw-r--r-- | arch/m68k/include/asm/cache.h | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h index 5c9bb30..f9e2d15 100644 --- a/arch/m68k/include/asm/cache.h +++ b/arch/m68k/include/asm/cache.h @@ -1,7 +1,7 @@ /* * ColdFire cache * - * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. + * Copyright 2004-2012 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) * * See file CREDITS for list of people who contributed to this @@ -37,10 +37,9 @@ #if defined(CONFIG_MCF547x_8x) || defined(CONFIG_MCF5445x) #define CONFIG_CF_V4 -#if defined(CONFIG_MCF5441x) +#elif defined(CONFIG_MCF5441x) #define CONFIG_CF_V4E /* Four Extra ACRn */ #endif -#endif /* ***** CACR ***** */ /* V2 Core */ @@ -87,7 +86,7 @@ #endif /* CONFIG_CF_V3 */ /* V4 Core */ -#ifdef CONFIG_CF_V4 +#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E) #define CF_CACR_DEC (1 << 31) #define CF_CACR_DW (1 << 30) @@ -113,7 +112,7 @@ #define CF_CACR_IDSP (1 << 7) #define CF_CACR_EUSP (1 << 5) -#ifdef CONFIG_MCF5445x +#if defined(CONFIG_MCF5445x) || defined(CONFIG_MCF5441x) #define CF_CACR_IVO (1 << 20) #define CF_CACR_SPA (1 << 14) #else @@ -148,7 +147,7 @@ #endif /* CONFIG_CF_V2 */ /* V4 Core */ -#ifdef CONFIG_CF_V4 +#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E) #define CF_ACR_AMM (1 << 10) #define CF_ACR_SP (1 << 3) #endif /* CONFIG_CF_V4 */ |