Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

Conflicts:
	boards.cfg

4 files changed, 26 insertions, 19 deletions

diff --git a/arch/m68k/cpu/mcf523x/cpu_init.c b/arch/m68k/cpu/mcf523x/cpu_init.c
index 5a78954..af1fd56 100644
--- a/arch/m68k/cpu/mcf523x/cpu_init.c
+++ b/arch/m68k/cpu/mcf523x/cpu_init.c
@@ -20,6 +20,13 @@
 #include <asm/fec.h>
 #endif
 
+/* The registers in fbcs_t struct can be 16-bit for CONFIG_M5235 or 32-bit wide otherwise. */
+#ifdef CONFIG_M5235
+#define out_be_fbcs_reg		out_be16
+#else
+#define out_be_fbcs_reg		out_be32
+#endif
+
 /*
  * Breath some life into the CPU...
  *
@@ -45,57 +52,57 @@ void cpu_init_f(void)
 	out_8(&gpio->par_cs, 0);
 
 #if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) && defined(CONFIG_SYS_CS0_CTRL))
-	out_be32(&fbcs->csar0, CONFIG_SYS_CS0_BASE);
-	out_be32(&fbcs->cscr0, CONFIG_SYS_CS0_CTRL);
+	out_be_fbcs_reg(&fbcs->csar0, CONFIG_SYS_CS0_BASE);
+	out_be_fbcs_reg(&fbcs->cscr0, CONFIG_SYS_CS0_CTRL);
 	out_be32(&fbcs->csmr0, CONFIG_SYS_CS0_MASK);
 #endif
 
 #if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) && defined(CONFIG_SYS_CS1_CTRL))
 	setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS1);
-	out_be32(&fbcs->csar1, CONFIG_SYS_CS1_BASE);
-	out_be32(&fbcs->cscr1, CONFIG_SYS_CS1_CTRL);
+	out_be_fbcs_reg(&fbcs->csar1, CONFIG_SYS_CS1_BASE);
+	out_be_fbcs_reg(&fbcs->cscr1, CONFIG_SYS_CS1_CTRL);
 	out_be32(&fbcs->csmr1, CONFIG_SYS_CS1_MASK);
 #endif
 
 #if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) && defined(CONFIG_SYS_CS2_CTRL))
 	setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS2);
-	out_be32(&fbcs->csar2, CONFIG_SYS_CS2_BASE);
-	out_be32(&fbcs->cscr2, CONFIG_SYS_CS2_CTRL);
+	out_be_fbcs_reg(&fbcs->csar2, CONFIG_SYS_CS2_BASE);
+	out_be_fbcs_reg(&fbcs->cscr2, CONFIG_SYS_CS2_CTRL);
 	out_be32(&fbcs->csmr2, CONFIG_SYS_CS2_MASK);
 #endif
 
 #if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) && defined(CONFIG_SYS_CS3_CTRL))
 	setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS3);
-	out_be32(&fbcs->csar3, CONFIG_SYS_CS3_BASE);
-	out_be32(&fbcs->cscr3, CONFIG_SYS_CS3_CTRL);
+	out_be_fbcs_reg(&fbcs->csar3, CONFIG_SYS_CS3_BASE);
+	out_be_fbcs_reg(&fbcs->cscr3, CONFIG_SYS_CS3_CTRL);
 	out_be32(&fbcs->csmr3, CONFIG_SYS_CS3_MASK);
 #endif
 
 #if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) && defined(CONFIG_SYS_CS4_CTRL))
 	setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS4);
-	out_be32(&fbcs->csar4, CONFIG_SYS_CS4_BASE);
-	out_be32(&fbcs->cscr4, CONFIG_SYS_CS4_CTRL);
+	out_be_fbcs_reg(&fbcs->csar4, CONFIG_SYS_CS4_BASE);
+	out_be_fbcs_reg(&fbcs->cscr4, CONFIG_SYS_CS4_CTRL);
 	out_be32(&fbcs->csmr4, CONFIG_SYS_CS4_MASK);
 #endif
 
 #if (defined(CONFIG_SYS_CS5_BASE) && defined(CONFIG_SYS_CS5_MASK) && defined(CONFIG_SYS_CS5_CTRL))
 	setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS5);
-	out_be32(&fbcs->csar5, CONFIG_SYS_CS5_BASE);
-	out_be32(&fbcs->cscr5, CONFIG_SYS_CS5_CTRL);
+	out_be_fbcs_reg(&fbcs->csar5, CONFIG_SYS_CS5_BASE);
+	out_be_fbcs_reg(&fbcs->cscr5, CONFIG_SYS_CS5_CTRL);
 	out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK);
 #endif
 
 #if (defined(CONFIG_SYS_CS6_BASE) && defined(CONFIG_SYS_CS6_MASK) && defined(CONFIG_SYS_CS6_CTRL))
 	setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS6);
-	out_be32(&fbcs->csar6, CONFIG_SYS_CS6_BASE);
-	out_be32(&fbcs->cscr6, CONFIG_SYS_CS6_CTRL);
+	out_be_fbcs_reg(&fbcs->csar6, CONFIG_SYS_CS6_BASE);
+	out_be_fbcs_reg(&fbcs->cscr6, CONFIG_SYS_CS6_CTRL);
 	out_be32(&fbcs->csmr6, CONFIG_SYS_CS6_MASK);
 #endif
 
 #if (defined(CONFIG_SYS_CS7_BASE) && defined(CONFIG_SYS_CS7_MASK) && defined(CONFIG_SYS_CS7_CTRL))
 	setbits_8(&gpio->par_cs, GPIO_PAR_CS_CS7);
-	out_be32(&fbcs->csar7, CONFIG_SYS_CS7_BASE);
-	out_be32(&fbcs->cscr7, CONFIG_SYS_CS7_CTRL);
+	out_be_fbcs_reg(&fbcs->csar7, CONFIG_SYS_CS7_BASE);
+	out_be_fbcs_reg(&fbcs->cscr7, CONFIG_SYS_CS7_CTRL);
 	out_be32(&fbcs->csmr7, CONFIG_SYS_CS7_MASK);
 #endif
 
diff --git a/arch/m68k/cpu/mcf532x/cpu_init.c b/arch/m68k/cpu/mcf532x/cpu_init.c
index db7ded4..8d01f5f 100644
--- a/arch/m68k/cpu/mcf532x/cpu_init.c
+++ b/arch/m68k/cpu/mcf532x/cpu_init.c
@@ -208,10 +208,10 @@ void cpu_init_f(void)
 	scm2_t *scm2 = (scm2_t *) MMAP_SCM2;
 	gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 	fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
+#ifndef CONFIG_WATCHDOG
 	wdog_t *wdog = (wdog_t *) MMAP_WDOG;
 
 	/* watchdog is enabled by default - disable the watchdog */
-#ifndef CONFIG_WATCHDOG
 	out_be16(&wdog->cr, 0);
 #endif
 
diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c
index 9c324dc..b4a8eef 100644
--- a/arch/m68k/cpu/mcf5445x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5445x/cpu_init.c
@@ -364,9 +364,9 @@ void uart_port_conf(int port)
 int fecpin_setclear(struct eth_device *dev, int setclear)
 {
 	gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+#ifdef CONFIG_MCF5445x
 	struct fec_info_s *info = (struct fec_info_s *)dev->priv;
 
-#ifdef CONFIG_MCF5445x
 	if (setclear) {
 #ifdef CONFIG_SYS_FEC_NO_SHARED_PHY
 		if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
diff --git a/arch/m68k/cpu/mcf5445x/speed.c b/arch/m68k/cpu/mcf5445x/speed.c
index 07a9b35..4e363a4 100644
--- a/arch/m68k/cpu/mcf5445x/speed.c
+++ b/arch/m68k/cpu/mcf5445x/speed.c
@@ -115,7 +115,7 @@ void setup_5441x_clocks(void)
 	gd->cpu_clk = vco / temp;	/* cpu clock */
 	gd->arch.flb_clk = vco / temp;	/* FlexBus clock */
 	gd->arch.flb_clk >>= 1;
-	if (in_be16(ccm->misccr2) & 2)		/* fsys/4 */
+	if (in_be16(&ccm->misccr2) & 2)		/* fsys/4 */
 		gd->arch.flb_clk >>= 1;
 
 	temp = ((pdr & PLL_DR_OUTDIV2_BITS) >> 5) + 1;