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author | Alison Wang <b18965@freescale.com> | 2012-03-26 21:49:03 +0000 |
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committer | jason <jason@jason-ThinkPad-T61.(none)> | 2012-09-20 20:39:26 +0800 |
commit | 849fc424713d176f90af0b05f6161bc3803ca887 (patch) | |
tree | b392df558b26be71294fde97c631067f45bc56c1 /arch/m68k/cpu/mcf5227x/interrupts.c | |
parent | 33d4411931423a0524b968e44e068ac6c38e23e0 (diff) | |
download | u-boot-imx-849fc424713d176f90af0b05f6161bc3803ca887.zip u-boot-imx-849fc424713d176f90af0b05f6161bc3803ca887.tar.gz u-boot-imx-849fc424713d176f90af0b05f6161bc3803ca887.tar.bz2 |
ColdFire: Clean up checkpatch warnings for MCF5227x
Signed-off-by: Alison Wang <b18965@freescale.com>
Diffstat (limited to 'arch/m68k/cpu/mcf5227x/interrupts.c')
-rw-r--r-- | arch/m68k/cpu/mcf5227x/interrupts.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/arch/m68k/cpu/mcf5227x/interrupts.c b/arch/m68k/cpu/mcf5227x/interrupts.c index 85828a6..a2cf519 100644 --- a/arch/m68k/cpu/mcf5227x/interrupts.c +++ b/arch/m68k/cpu/mcf5227x/interrupts.c @@ -3,7 +3,7 @@ * (C) Copyright 2000-2004 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) * * See file CREDITS for list of people who contributed to this @@ -28,14 +28,15 @@ /* CPU specific interrupt routine */ #include <common.h> #include <asm/immap.h> +#include <asm/io.h> int interrupt_init(void) { - volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); + int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); /* Make sure all interrupts are disabled */ - intp->imrh0 |= 0xFFFFFFFF; - intp->imrl0 |= 0xFFFFFFFF; + setbits_be32(&intp->imrh0, 0xffffffff); + setbits_be32(&intp->imrl0, 0xffffffff); enable_interrupts(); return 0; @@ -44,9 +45,9 @@ int interrupt_init(void) #if defined(CONFIG_MCFTMR) void dtimer_intr_setup(void) { - volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); + int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); - intp->icr0[CONFIG_SYS_TMRINTR_NO] = CONFIG_SYS_TMRINTR_PRI; - intp->imrh0 &= ~CONFIG_SYS_TMRINTR_MASK; + out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); + clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK); } #endif |