x86: Add processor flags header from linux

5 files changed, 21 insertions, 10 deletions

diff --git a/arch/i386/cpu/cpu.c b/arch/i386/cpu/cpu.c
index 1dcbb98..e96380a 100644
--- a/arch/i386/cpu/cpu.c
+++ b/arch/i386/cpu/cpu.c
@@ -36,6 +36,7 @@
 #include <common.h>
 #include <command.h>
 #include <asm/processor.h>
+#include <asm/processor-flags.h>
 #include <asm/interrupt.h>
 
 /* Constructor for a conventional segment GDT (or LDT) entry */
@@ -88,12 +89,16 @@ static void reload_gdt(void)
 
 int cpu_init_f(void)
 {
+	const u32 em_rst = ~X86_CR0_EM;
+	const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE;
+
 	/* initialize FPU, reset EM, set MP and NE */
 	asm ("fninit\n" \
-	     "movl %cr0, %eax\n" \
-	     "andl $~0x4, %eax\n" \
-	     "orl  $0x22, %eax\n" \
-	     "movl %eax, %cr0\n" );
+	     "movl %%cr0, %%eax\n" \
+	     "andl %0, %%eax\n" \
+	     "orl  %1, %%eax\n" \
+	     "movl %%eax, %%cr0\n" \
+	     : : "i" (em_rst), "i" (mp_ne_set) : "eax");
 
 	return 0;
 }
diff --git a/arch/i386/cpu/interrupts.c b/arch/i386/cpu/interrupts.c
index cdff3d9..1cefe02 100644
--- a/arch/i386/cpu/interrupts.c
+++ b/arch/i386/cpu/interrupts.c
@@ -30,6 +30,7 @@
 #include <common.h>
 #include <asm/interrupt.h>
 #include <asm/io.h>
+#include <asm/processor-flags.h>
 
 #define DECLARE_INTERRUPT(x) \
 	".globl irq_"#x"\n" \
@@ -237,7 +238,7 @@ int disable_interrupts(void)
 
 	asm volatile ("pushfl ; popl %0 ; cli\n" : "=g" (flags) : );
 
-	return (flags&0x200); /* IE flags is bit 9 */
+	return flags & X86_EFLAGS_IF; /* IE flags is bit 9 */
 }
 
 /* IRQ Low-Level Service Routine */
diff --git a/arch/i386/cpu/sc520/sc520.c b/arch/i386/cpu/sc520/sc520.c
index 7acd471..21037d2 100644
--- a/arch/i386/cpu/sc520/sc520.c
+++ b/arch/i386/cpu/sc520/sc520.c
@@ -26,6 +26,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <asm/processor-flags.h>
 #include <asm/ic/sc520.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -41,6 +42,8 @@ volatile sc520_mmcr_t *sc520_mmcr = (sc520_mmcr_t *)0xfffef000;
 
 void init_sc520(void)
 {
+	const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD);
+
 	/*
 	 * Set the UARTxCTL register at it's slower,
 	 * baud clock giving us a 1.8432 MHz reference
@@ -84,8 +87,8 @@ void init_sc520(void)
 
 	/* turn on the cache and disable write through */
 	asm("movl	%%cr0, %%eax\n"
-	    "andl	$0x9fffffff, %%eax\n"
-	    "movl	%%eax, %%cr0\n"  : : : "eax");
+	    "andl	%0, %%eax\n"
+	    "movl	%%eax, %%cr0\n"  : : "i" (nw_cd_rst) : "eax");
 }
 
 unsigned long init_sc520_dram(void)
diff --git a/arch/i386/cpu/start.S b/arch/i386/cpu/start.S
index ab9338a..460c21b 100644
--- a/arch/i386/cpu/start.S
+++ b/arch/i386/cpu/start.S
@@ -26,6 +26,7 @@
 #include <config.h>
 #include <version.h>
 #include <asm/global_data.h>
+#include <asm/processor-flags.h>
 
 
 .section .text
@@ -46,7 +47,7 @@ _i386boot_start:
 
 	/* Turn of cache (this might require a 486-class CPU) */
 	movl	%cr0, %eax
-	orl	$0x60000000, %eax
+	orl	$(X86_CR0_NW | X86_CR0_CD), %eax
 	movl	%eax, %cr0
 	wbinvd
 
diff --git a/arch/i386/cpu/start16.S b/arch/i386/cpu/start16.S
index 0a5823d..7dc5358 100644
--- a/arch/i386/cpu/start16.S
+++ b/arch/i386/cpu/start16.S
@@ -23,6 +23,7 @@
  */
 
 #include <asm/global_data.h>
+#include <asm/processor-flags.h>
 
 #define BOOT_SEG	0xffff0000	/* linear segment of boot code */
 #define a32		.byte 0x67;
@@ -45,7 +46,7 @@ board_init16_ret:
 
 	/* Turn of cache (this might require a 486-class CPU) */
 	movl	%cr0, %eax
-	orl	$0x60000000, %eax
+	orl	$(X86_CR0_NW & X86_CR0_CD), %eax
 	movl	%eax, %cr0
 	wbinvd
 
@@ -55,7 +56,7 @@ o32 cs	lgdt	gdt_ptr
 
 	/* Now, we enter protected mode */
 	movl	%cr0, %eax
-	orl	$1, %eax
+	orl	$X86_CR0_PE, %eax
 	movl	%eax, %cr0
 
 	/* Flush the prefetch queue */