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authorKim Phillips <kim.phillips@freescale.com>2011-04-01 16:53:18 -0500
committerKim Phillips <kim.phillips@freescale.com>2011-04-04 20:23:20 -0500
commit84d2e03f9d629fe3796d577d4759388699b926ad (patch)
tree471427ab2753b7234572267da5d600129113ca5b /arch/blackfin
parent67a490d60d70f2b01d55976440ba30154af96965 (diff)
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mpc83xx: restrict UTMI PHY configuration to 831x parts
i.e, to those parts that have PHY_CLK_VALID bits in their USB CONTROL registers: mpc8308 WU_INT, PHY_CLK_SEL, USB_EN, WU_INT_EN, ULPI_INT_EN mpc831x PHY_CLK_VALID, WU_INT, CLKIN_SEL, PHY_CLK_SEL, UTMI_PHY_EN, PLL_RESET, REFSEL, OTG_PORT, KEEP_OTG_ON, LSF_EN, USB_EN, ULPI_INT_EN mpc834x USB_EN, ULPI_INT1_EN (MPH only), ULPI_INT0_EN mpc837x USB_EN, ULPI_INT_EN (mpc832x, mpc8360 don't have a USB_EHCI_FSL compatible controller) this prevents non-831x parts from never completing cpu_init_f(), because the (non-existent) PHY_CLK_VALID bit never gets set. Reported-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Tested-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Diffstat (limited to 'arch/blackfin')
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