diff options
author | Mike Frysinger <vapier@gentoo.org> | 2010-07-26 01:10:35 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2010-10-02 16:00:38 -0400 |
commit | 9615398dc2829e06b4ea538836361310f58b3aaa (patch) | |
tree | ce5fa126df4aface4781c92a40e40e7f31ded7d7 /arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h | |
parent | aa79cbbf27b87ea64eea3cba30820bc4e083675c (diff) | |
download | u-boot-imx-9615398dc2829e06b4ea538836361310f58b3aaa.zip u-boot-imx-9615398dc2829e06b4ea538836361310f58b3aaa.tar.gz u-boot-imx-9615398dc2829e06b4ea538836361310f58b3aaa.tar.bz2 |
Blackfin: unify core MMRs
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h')
-rw-r--r-- | arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h | 232 |
1 files changed, 228 insertions, 4 deletions
diff --git a/arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h b/arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h index f9352ae..3acf94b 100644 --- a/arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h +++ b/arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h @@ -6,6 +6,227 @@ #ifndef __BFIN_CDEF_ADSP_EDN_core__ #define __BFIN_CDEF_ADSP_EDN_core__ +#define bfin_read_SRAM_BASE_ADDR() bfin_readPTR(SRAM_BASE_ADDR) +#define bfin_write_SRAM_BASE_ADDR(val) bfin_writePTR(SRAM_BASE_ADDR, val) +#define bfin_read_DMEM_CONTROL() bfin_read32(DMEM_CONTROL) +#define bfin_write_DMEM_CONTROL(val) bfin_write32(DMEM_CONTROL, val) +#define bfin_read_DCPLB_FAULT_STATUS() bfin_read32(DCPLB_FAULT_STATUS) +#define bfin_write_DCPLB_FAULT_STATUS(val) bfin_write32(DCPLB_FAULT_STATUS, val) +#define bfin_read_DCPLB_FAULT_ADDR() bfin_readPTR(DCPLB_FAULT_ADDR) +#define bfin_write_DCPLB_FAULT_ADDR(val) bfin_writePTR(DCPLB_FAULT_ADDR, val) +#define bfin_read_DCPLB_ADDR0() bfin_readPTR(DCPLB_ADDR0) +#define bfin_write_DCPLB_ADDR0(val) bfin_writePTR(DCPLB_ADDR0, val) +#define bfin_read_DCPLB_ADDR1() bfin_readPTR(DCPLB_ADDR1) +#define bfin_write_DCPLB_ADDR1(val) bfin_writePTR(DCPLB_ADDR1, val) +#define bfin_read_DCPLB_ADDR2() bfin_readPTR(DCPLB_ADDR2) +#define bfin_write_DCPLB_ADDR2(val) bfin_writePTR(DCPLB_ADDR2, val) +#define bfin_read_DCPLB_ADDR3() bfin_readPTR(DCPLB_ADDR3) +#define bfin_write_DCPLB_ADDR3(val) bfin_writePTR(DCPLB_ADDR3, val) +#define bfin_read_DCPLB_ADDR4() bfin_readPTR(DCPLB_ADDR4) +#define bfin_write_DCPLB_ADDR4(val) bfin_writePTR(DCPLB_ADDR4, val) +#define bfin_read_DCPLB_ADDR5() bfin_readPTR(DCPLB_ADDR5) +#define bfin_write_DCPLB_ADDR5(val) bfin_writePTR(DCPLB_ADDR5, val) +#define bfin_read_DCPLB_ADDR6() bfin_readPTR(DCPLB_ADDR6) +#define bfin_write_DCPLB_ADDR6(val) bfin_writePTR(DCPLB_ADDR6, val) +#define bfin_read_DCPLB_ADDR7() bfin_readPTR(DCPLB_ADDR7) +#define bfin_write_DCPLB_ADDR7(val) bfin_writePTR(DCPLB_ADDR7, val) +#define bfin_read_DCPLB_ADDR8() bfin_readPTR(DCPLB_ADDR8) +#define bfin_write_DCPLB_ADDR8(val) bfin_writePTR(DCPLB_ADDR8, val) +#define bfin_read_DCPLB_ADDR9() bfin_readPTR(DCPLB_ADDR9) +#define bfin_write_DCPLB_ADDR9(val) bfin_writePTR(DCPLB_ADDR9, val) +#define bfin_read_DCPLB_ADDR10() bfin_readPTR(DCPLB_ADDR10) +#define bfin_write_DCPLB_ADDR10(val) bfin_writePTR(DCPLB_ADDR10, val) +#define bfin_read_DCPLB_ADDR11() bfin_readPTR(DCPLB_ADDR11) +#define bfin_write_DCPLB_ADDR11(val) bfin_writePTR(DCPLB_ADDR11, val) +#define bfin_read_DCPLB_ADDR12() bfin_readPTR(DCPLB_ADDR12) +#define bfin_write_DCPLB_ADDR12(val) bfin_writePTR(DCPLB_ADDR12, val) +#define bfin_read_DCPLB_ADDR13() bfin_readPTR(DCPLB_ADDR13) +#define bfin_write_DCPLB_ADDR13(val) bfin_writePTR(DCPLB_ADDR13, val) +#define bfin_read_DCPLB_ADDR14() bfin_readPTR(DCPLB_ADDR14) +#define bfin_write_DCPLB_ADDR14(val) bfin_writePTR(DCPLB_ADDR14, val) +#define bfin_read_DCPLB_ADDR15() bfin_readPTR(DCPLB_ADDR15) +#define bfin_write_DCPLB_ADDR15(val) bfin_writePTR(DCPLB_ADDR15, val) +#define bfin_read_DCPLB_DATA0() bfin_read32(DCPLB_DATA0) +#define bfin_write_DCPLB_DATA0(val) bfin_write32(DCPLB_DATA0, val) +#define bfin_read_DCPLB_DATA1() bfin_read32(DCPLB_DATA1) +#define bfin_write_DCPLB_DATA1(val) bfin_write32(DCPLB_DATA1, val) +#define bfin_read_DCPLB_DATA2() bfin_read32(DCPLB_DATA2) +#define bfin_write_DCPLB_DATA2(val) bfin_write32(DCPLB_DATA2, val) +#define bfin_read_DCPLB_DATA3() bfin_read32(DCPLB_DATA3) +#define bfin_write_DCPLB_DATA3(val) bfin_write32(DCPLB_DATA3, val) +#define bfin_read_DCPLB_DATA4() bfin_read32(DCPLB_DATA4) +#define bfin_write_DCPLB_DATA4(val) bfin_write32(DCPLB_DATA4, val) +#define bfin_read_DCPLB_DATA5() bfin_read32(DCPLB_DATA5) +#define bfin_write_DCPLB_DATA5(val) bfin_write32(DCPLB_DATA5, val) +#define bfin_read_DCPLB_DATA6() bfin_read32(DCPLB_DATA6) +#define bfin_write_DCPLB_DATA6(val) bfin_write32(DCPLB_DATA6, val) +#define bfin_read_DCPLB_DATA7() bfin_read32(DCPLB_DATA7) +#define bfin_write_DCPLB_DATA7(val) bfin_write32(DCPLB_DATA7, val) +#define bfin_read_DCPLB_DATA8() bfin_read32(DCPLB_DATA8) +#define bfin_write_DCPLB_DATA8(val) bfin_write32(DCPLB_DATA8, val) +#define bfin_read_DCPLB_DATA9() bfin_read32(DCPLB_DATA9) +#define bfin_write_DCPLB_DATA9(val) bfin_write32(DCPLB_DATA9, val) +#define bfin_read_DCPLB_DATA10() bfin_read32(DCPLB_DATA10) +#define bfin_write_DCPLB_DATA10(val) bfin_write32(DCPLB_DATA10, val) +#define bfin_read_DCPLB_DATA11() bfin_read32(DCPLB_DATA11) +#define bfin_write_DCPLB_DATA11(val) bfin_write32(DCPLB_DATA11, val) +#define bfin_read_DCPLB_DATA12() bfin_read32(DCPLB_DATA12) +#define bfin_write_DCPLB_DATA12(val) bfin_write32(DCPLB_DATA12, val) +#define bfin_read_DCPLB_DATA13() bfin_read32(DCPLB_DATA13) +#define bfin_write_DCPLB_DATA13(val) bfin_write32(DCPLB_DATA13, val) +#define bfin_read_DCPLB_DATA14() bfin_read32(DCPLB_DATA14) +#define bfin_write_DCPLB_DATA14(val) bfin_write32(DCPLB_DATA14, val) +#define bfin_read_DCPLB_DATA15() bfin_read32(DCPLB_DATA15) +#define bfin_write_DCPLB_DATA15(val) bfin_write32(DCPLB_DATA15, val) +#define bfin_read_DTEST_COMMAND() bfin_read32(DTEST_COMMAND) +#define bfin_write_DTEST_COMMAND(val) bfin_write32(DTEST_COMMAND, val) +#define bfin_read_DTEST_DATA0() bfin_read32(DTEST_DATA0) +#define bfin_write_DTEST_DATA0(val) bfin_write32(DTEST_DATA0, val) +#define bfin_read_DTEST_DATA1() bfin_read32(DTEST_DATA1) +#define bfin_write_DTEST_DATA1(val) bfin_write32(DTEST_DATA1, val) + +#define bfin_read_IMEM_CONTROL() bfin_read32(IMEM_CONTROL) +#define bfin_write_IMEM_CONTROL(val) bfin_write32(IMEM_CONTROL, val) +#define bfin_read_ICPLB_STATUS() bfin_read32(ICPLB_STATUS) +#define bfin_write_ICPLB_STATUS(val) bfin_write32(ICPLB_STATUS, val) +#define bfin_read_ICPLB_FAULT_ADDR() bfin_readPTR(ICPLB_FAULT_ADDR) +#define bfin_write_ICPLB_FAULT_ADDR(val) bfin_writePTR(ICPLB_FAULT_ADDR, val) +#define bfin_read_ICPLB_ADDR0() bfin_readPTR(ICPLB_ADDR0) +#define bfin_write_ICPLB_ADDR0(val) bfin_writePTR(ICPLB_ADDR0, val) +#define bfin_read_ICPLB_ADDR1() bfin_readPTR(ICPLB_ADDR1) +#define bfin_write_ICPLB_ADDR1(val) bfin_writePTR(ICPLB_ADDR1, val) +#define bfin_read_ICPLB_ADDR2() bfin_readPTR(ICPLB_ADDR2) +#define bfin_write_ICPLB_ADDR2(val) bfin_writePTR(ICPLB_ADDR2, val) +#define bfin_read_ICPLB_ADDR3() bfin_readPTR(ICPLB_ADDR3) +#define bfin_write_ICPLB_ADDR3(val) bfin_writePTR(ICPLB_ADDR3, val) +#define bfin_read_ICPLB_ADDR4() bfin_readPTR(ICPLB_ADDR4) +#define bfin_write_ICPLB_ADDR4(val) bfin_writePTR(ICPLB_ADDR4, val) +#define bfin_read_ICPLB_ADDR5() bfin_readPTR(ICPLB_ADDR5) +#define bfin_write_ICPLB_ADDR5(val) bfin_writePTR(ICPLB_ADDR5, val) +#define bfin_read_ICPLB_ADDR6() bfin_readPTR(ICPLB_ADDR6) +#define bfin_write_ICPLB_ADDR6(val) bfin_writePTR(ICPLB_ADDR6, val) +#define bfin_read_ICPLB_ADDR7() bfin_readPTR(ICPLB_ADDR7) +#define bfin_write_ICPLB_ADDR7(val) bfin_writePTR(ICPLB_ADDR7, val) +#define bfin_read_ICPLB_ADDR8() bfin_readPTR(ICPLB_ADDR8) +#define bfin_write_ICPLB_ADDR8(val) bfin_writePTR(ICPLB_ADDR8, val) +#define bfin_read_ICPLB_ADDR9() bfin_readPTR(ICPLB_ADDR9) +#define bfin_write_ICPLB_ADDR9(val) bfin_writePTR(ICPLB_ADDR9, val) +#define bfin_read_ICPLB_ADDR10() bfin_readPTR(ICPLB_ADDR10) +#define bfin_write_ICPLB_ADDR10(val) bfin_writePTR(ICPLB_ADDR10, val) +#define bfin_read_ICPLB_ADDR11() bfin_readPTR(ICPLB_ADDR11) +#define bfin_write_ICPLB_ADDR11(val) bfin_writePTR(ICPLB_ADDR11, val) +#define bfin_read_ICPLB_ADDR12() bfin_readPTR(ICPLB_ADDR12) +#define bfin_write_ICPLB_ADDR12(val) bfin_writePTR(ICPLB_ADDR12, val) +#define bfin_read_ICPLB_ADDR13() bfin_readPTR(ICPLB_ADDR13) +#define bfin_write_ICPLB_ADDR13(val) bfin_writePTR(ICPLB_ADDR13, val) +#define bfin_read_ICPLB_ADDR14() bfin_readPTR(ICPLB_ADDR14) +#define bfin_write_ICPLB_ADDR14(val) bfin_writePTR(ICPLB_ADDR14, val) +#define bfin_read_ICPLB_ADDR15() bfin_readPTR(ICPLB_ADDR15) +#define bfin_write_ICPLB_ADDR15(val) bfin_writePTR(ICPLB_ADDR15, val) +#define bfin_read_ICPLB_DATA0() bfin_read32(ICPLB_DATA0) +#define bfin_write_ICPLB_DATA0(val) bfin_write32(ICPLB_DATA0, val) +#define bfin_read_ICPLB_DATA1() bfin_read32(ICPLB_DATA1) +#define bfin_write_ICPLB_DATA1(val) bfin_write32(ICPLB_DATA1, val) +#define bfin_read_ICPLB_DATA2() bfin_read32(ICPLB_DATA2) +#define bfin_write_ICPLB_DATA2(val) bfin_write32(ICPLB_DATA2, val) +#define bfin_read_ICPLB_DATA3() bfin_read32(ICPLB_DATA3) +#define bfin_write_ICPLB_DATA3(val) bfin_write32(ICPLB_DATA3, val) +#define bfin_read_ICPLB_DATA4() bfin_read32(ICPLB_DATA4) +#define bfin_write_ICPLB_DATA4(val) bfin_write32(ICPLB_DATA4, val) +#define bfin_read_ICPLB_DATA5() bfin_read32(ICPLB_DATA5) +#define bfin_write_ICPLB_DATA5(val) bfin_write32(ICPLB_DATA5, val) +#define bfin_read_ICPLB_DATA6() bfin_read32(ICPLB_DATA6) +#define bfin_write_ICPLB_DATA6(val) bfin_write32(ICPLB_DATA6, val) +#define bfin_read_ICPLB_DATA7() bfin_read32(ICPLB_DATA7) +#define bfin_write_ICPLB_DATA7(val) bfin_write32(ICPLB_DATA7, val) +#define bfin_read_ICPLB_DATA8() bfin_read32(ICPLB_DATA8) +#define bfin_write_ICPLB_DATA8(val) bfin_write32(ICPLB_DATA8, val) +#define bfin_read_ICPLB_DATA9() bfin_read32(ICPLB_DATA9) +#define bfin_write_ICPLB_DATA9(val) bfin_write32(ICPLB_DATA9, val) +#define bfin_read_ICPLB_DATA10() bfin_read32(ICPLB_DATA10) +#define bfin_write_ICPLB_DATA10(val) bfin_write32(ICPLB_DATA10, val) +#define bfin_read_ICPLB_DATA11() bfin_read32(ICPLB_DATA11) +#define bfin_write_ICPLB_DATA11(val) bfin_write32(ICPLB_DATA11, val) +#define bfin_read_ICPLB_DATA12() bfin_read32(ICPLB_DATA12) +#define bfin_write_ICPLB_DATA12(val) bfin_write32(ICPLB_DATA12, val) +#define bfin_read_ICPLB_DATA13() bfin_read32(ICPLB_DATA13) +#define bfin_write_ICPLB_DATA13(val) bfin_write32(ICPLB_DATA13, val) +#define bfin_read_ICPLB_DATA14() bfin_read32(ICPLB_DATA14) +#define bfin_write_ICPLB_DATA14(val) bfin_write32(ICPLB_DATA14, val) +#define bfin_read_ICPLB_DATA15() bfin_read32(ICPLB_DATA15) +#define bfin_write_ICPLB_DATA15(val) bfin_write32(ICPLB_DATA15, val) +#define bfin_read_ITEST_COMMAND() bfin_read32(ITEST_COMMAND) +#define bfin_write_ITEST_COMMAND(val) bfin_write32(ITEST_COMMAND, val) +#define bfin_read_ITEST_DATA0() bfin_read32(ITEST_DATA0) +#define bfin_write_ITEST_DATA0(val) bfin_write32(ITEST_DATA0, val) +#define bfin_read_ITEST_DATA1() bfin_read32(ITEST_DATA1) +#define bfin_write_ITEST_DATA1(val) bfin_write32(ITEST_DATA1, val) + +#define bfin_read_EVT0() bfin_readPTR(EVT0) +#define bfin_write_EVT0(val) bfin_writePTR(EVT0, val) +#define bfin_read_EVT1() bfin_readPTR(EVT1) +#define bfin_write_EVT1(val) bfin_writePTR(EVT1, val) +#define bfin_read_EVT2() bfin_readPTR(EVT2) +#define bfin_write_EVT2(val) bfin_writePTR(EVT2, val) +#define bfin_read_EVT3() bfin_readPTR(EVT3) +#define bfin_write_EVT3(val) bfin_writePTR(EVT3, val) +#define bfin_read_EVT4() bfin_readPTR(EVT4) +#define bfin_write_EVT4(val) bfin_writePTR(EVT4, val) +#define bfin_read_EVT5() bfin_readPTR(EVT5) +#define bfin_write_EVT5(val) bfin_writePTR(EVT5, val) +#define bfin_read_EVT6() bfin_readPTR(EVT6) +#define bfin_write_EVT6(val) bfin_writePTR(EVT6, val) +#define bfin_read_EVT7() bfin_readPTR(EVT7) +#define bfin_write_EVT7(val) bfin_writePTR(EVT7, val) +#define bfin_read_EVT8() bfin_readPTR(EVT8) +#define bfin_write_EVT8(val) bfin_writePTR(EVT8, val) +#define bfin_read_EVT9() bfin_readPTR(EVT9) +#define bfin_write_EVT9(val) bfin_writePTR(EVT9, val) +#define bfin_read_EVT10() bfin_readPTR(EVT10) +#define bfin_write_EVT10(val) bfin_writePTR(EVT10, val) +#define bfin_read_EVT11() bfin_readPTR(EVT11) +#define bfin_write_EVT11(val) bfin_writePTR(EVT11, val) +#define bfin_read_EVT12() bfin_readPTR(EVT12) +#define bfin_write_EVT12(val) bfin_writePTR(EVT12, val) +#define bfin_read_EVT13() bfin_readPTR(EVT13) +#define bfin_write_EVT13(val) bfin_writePTR(EVT13, val) +#define bfin_read_EVT14() bfin_readPTR(EVT14) +#define bfin_write_EVT14(val) bfin_writePTR(EVT14, val) +#define bfin_read_EVT15() bfin_readPTR(EVT15) +#define bfin_write_EVT15(val) bfin_writePTR(EVT15, val) + +#define bfin_read_EVT_OVERRIDE() bfin_read32(EVT_OVERRIDE) +#define bfin_write_EVT_OVERRIDE(val) bfin_write32(EVT_OVERRIDE, val) +#define bfin_read_ILAT() bfin_read32(ILAT) +#define bfin_write_ILAT(val) bfin_write32(ILAT, val) +#define bfin_read_IMASK() bfin_read32(IMASK) +#define bfin_write_IMASK(val) bfin_write32(IMASK, val) +#define bfin_read_IPEND() bfin_read32(IPEND) +#define bfin_write_IPEND(val) bfin_write32(IPEND, val) +#define bfin_read_IPRIO() bfin_read32(IPRIO) +#define bfin_write_IPRIO(val) bfin_write32(IPRIO, val) + +#define bfin_read_TCNTL() bfin_read32(TCNTL) +#define bfin_write_TCNTL(val) bfin_write32(TCNTL, val) +#define bfin_read_TPERIOD() bfin_read32(TPERIOD) +#define bfin_write_TPERIOD(val) bfin_write32(TPERIOD, val) +#define bfin_read_TSCALE() bfin_read32(TSCALE) +#define bfin_write_TSCALE(val) bfin_write32(TSCALE, val) +#define bfin_read_TCOUNT() bfin_read32(TCOUNT) +#define bfin_write_TCOUNT(val) bfin_write32(TCOUNT, val) + +#define bfin_read_DSPID() bfin_read32(DSPID) +#define bfin_write_DSPID(val) bfin_write32(DSPID, val) +#define bfin_read_DBGSTAT() bfin_read32(DBGSTAT) +#define bfin_write_DBGSTAT(val) bfin_write32(DBGSTAT, val) + +#define bfin_read_TBUFCTL() bfin_read32(TBUFCTL) +#define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL, val) +#define bfin_read_TBUFSTAT() bfin_read32(TBUFSTAT) +#define bfin_write_TBUFSTAT(val) bfin_write32(TBUFSTAT, val) +#define bfin_read_TBUF() bfin_readPTR(TBUF) +#define bfin_write_TBUF(val) bfin_writePTR(TBUF, val) + #define bfin_read_WPIACTL() bfin_read32(WPIACTL) #define bfin_write_WPIACTL(val) bfin_write32(WPIACTL, val) #define bfin_read_WPIA0() bfin_readPTR(WPIA0) @@ -44,9 +265,12 @@ #define bfin_write_WPDACNT1(val) bfin_write32(WPDACNT1, val) #define bfin_read_WPSTAT() bfin_read32(WPSTAT) #define bfin_write_WPSTAT(val) bfin_write32(WPSTAT, val) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) -#define bfin_read_DBGSTAT() bfin_read32(DBGSTAT) -#define bfin_write_DBGSTAT(val) bfin_write32(DBGSTAT, val) + +#define bfin_read_PFCTL() bfin_read32(PFCTL) +#define bfin_write_PFCTL(val) bfin_write32(PFCTL, val) +#define bfin_read_PFCNTR0() bfin_read32(PFCNTR0) +#define bfin_write_PFCNTR0(val) bfin_write32(PFCNTR0, val) +#define bfin_read_PFCNTR1() bfin_read32(PFCNTR1) +#define bfin_write_PFCNTR1(val) bfin_write32(PFCNTR1, val) #endif /* __BFIN_CDEF_ADSP_EDN_core__ */ |