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authorAndreas Bießmann <biessmann@corscience.de>2010-11-04 23:15:31 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-05-18 07:56:50 +0200
commitf4278b716c2925b4dcf18b94f0ff932d4736cd5d (patch)
tree53068e409b65794be28d2fa4deb6ef959b632de0 /arch/avr32
parent5d73bc7af75b004d4eb343572e3ff5bc5727a048 (diff)
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avr32: fixup definitions to ATMEL_BASE_xxx
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
Diffstat (limited to 'arch/avr32')
-rw-r--r--arch/avr32/cpu/at32ap700x/sm.h4
-rw-r--r--arch/avr32/cpu/hsdramc1.h4
-rw-r--r--arch/avr32/cpu/hsmc3.h4
-rw-r--r--arch/avr32/cpu/interrupts.c2
-rw-r--r--arch/avr32/include/asm/arch-at32ap700x/gpio.h10
-rw-r--r--arch/avr32/include/asm/arch-at32ap700x/hardware.h76
-rw-r--r--arch/avr32/include/asm/arch-at32ap700x/portmux.h10
-rw-r--r--arch/avr32/include/asm/hmatrix-common.h2
8 files changed, 56 insertions, 56 deletions
diff --git a/arch/avr32/cpu/at32ap700x/sm.h b/arch/avr32/cpu/at32ap700x/sm.h
index b6e4409..9a3804e 100644
--- a/arch/avr32/cpu/at32ap700x/sm.h
+++ b/arch/avr32/cpu/at32ap700x/sm.h
@@ -197,8 +197,8 @@
/* Register access macros */
#define sm_readl(reg) \
- readl((void *)SM_BASE + SM_##reg)
+ readl((void *)ATMEL_BASE_SM + SM_##reg)
#define sm_writel(reg,value) \
- writel((value), (void *)SM_BASE + SM_##reg)
+ writel((value), (void *)ATMEL_BASE_SM + SM_##reg)
#endif /* __CPU_AT32AP_SM_H__ */
diff --git a/arch/avr32/cpu/hsdramc1.h b/arch/avr32/cpu/hsdramc1.h
index 305d2cb..e18e074 100644
--- a/arch/avr32/cpu/hsdramc1.h
+++ b/arch/avr32/cpu/hsdramc1.h
@@ -136,8 +136,8 @@
/* Register access macros */
#define hsdramc1_readl(reg) \
- readl((void *)HSDRAMC_BASE + HSDRAMC1_##reg)
+ readl((void *)ATMEL_BASE_HSDRAMC + HSDRAMC1_##reg)
#define hsdramc1_writel(reg,value) \
- writel((value), (void *)HSDRAMC_BASE + HSDRAMC1_##reg)
+ writel((value), (void *)ATMEL_BASE_HSDRAMC + HSDRAMC1_##reg)
#endif /* __ASM_AVR32_HSDRAMC1_H__ */
diff --git a/arch/avr32/cpu/hsmc3.h b/arch/avr32/cpu/hsmc3.h
index ca533b9..ac47295 100644
--- a/arch/avr32/cpu/hsmc3.h
+++ b/arch/avr32/cpu/hsmc3.h
@@ -119,8 +119,8 @@
/* Register access macros */
#define hsmc3_readl(reg) \
- readl((void *)HSMC_BASE + HSMC3_##reg)
+ readl((void *)ATMEL_BASE_HSMC + HSMC3_##reg)
#define hsmc3_writel(reg,value) \
- writel((value), (void *)HSMC_BASE + HSMC3_##reg)
+ writel((value), (void *)ATMEL_BASE_HSMC + HSMC3_##reg)
#endif /* __CPU_AT32AP_HSMC3_H__ */
diff --git a/arch/avr32/cpu/interrupts.c b/arch/avr32/cpu/interrupts.c
index c751981..c6ea435 100644
--- a/arch/avr32/cpu/interrupts.c
+++ b/arch/avr32/cpu/interrupts.c
@@ -125,7 +125,7 @@ static int set_interrupt_handler(unsigned int nr, void (*handler)(void),
intpr = (handler_addr & HANDLER_MASK);
intpr |= (priority & INTLEV_MASK) << INTLEV_SHIFT;
- writel(intpr, (void *)INTC_BASE + 4 * nr);
+ writel(intpr, (void *)ATMEL_BASE_INTC + 4 * nr);
return 0;
}
diff --git a/arch/avr32/include/asm/arch-at32ap700x/gpio.h b/arch/avr32/include/asm/arch-at32ap700x/gpio.h
index b0254f2..4322eac 100644
--- a/arch/avr32/include/asm/arch-at32ap700x/gpio.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/gpio.h
@@ -45,15 +45,15 @@ static inline void *pio_pin_to_port(unsigned int pin)
{
switch (pin >> 5) {
case 0:
- return (void *)PIOA_BASE;
+ return (void *)ATMEL_BASE_PIOA;
case 1:
- return (void *)PIOB_BASE;
+ return (void *)ATMEL_BASE_PIOB;
case 2:
- return (void *)PIOC_BASE;
+ return (void *)ATMEL_BASE_PIOC;
case 3:
- return (void *)PIOD_BASE;
+ return (void *)ATMEL_BASE_PIOD;
case 4:
- return (void *)PIOE_BASE;
+ return (void *)ATMEL_BASE_PIOE;
default:
return NULL;
}
diff --git a/arch/avr32/include/asm/arch-at32ap700x/hardware.h b/arch/avr32/include/asm/arch-at32ap700x/hardware.h
index 6592c03..9172eef 100644
--- a/arch/avr32/include/asm/arch-at32ap700x/hardware.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/hardware.h
@@ -19,8 +19,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
-#ifndef __AT32AP7000_MEMORY_MAP_H__
-#define __AT32AP7000_MEMORY_MAP_H__
+#ifndef __AT32AP7000_HARDWARE_H__
+#define __AT32AP7000_HARDWARE_H__
/* Internal and external memories */
#define EBI_SRAM_CS0_BASE 0x00000000
@@ -43,44 +43,44 @@
#define INTERNAL_SRAM_SIZE 0x00008000
/* Devices on the High Speed Bus (HSB) */
-#define LCDC_BASE 0xFF000000
-#define DMAC_BASE 0xFF200000
-#define USB_FIFO 0xFF300000
+#define LCDC_BASE 0xFF000000
+#define DMAC_BASE 0xFF200000
+#define USB_FIFO 0xFF300000
/* Devices on Peripheral Bus A (PBA) */
-#define SPI0_BASE 0xFFE00000
-#define SPI1_BASE 0xFFE00400
-#define TWI_BASE 0xFFE00800
-#define USART0_BASE 0xFFE00C00
-#define USART1_BASE 0xFFE01000
-#define USART2_BASE 0xFFE01400
-#define USART3_BASE 0xFFE01800
-#define SSC0_BASE 0xFFE01C00
-#define SSC1_BASE 0xFFE02000
-#define SSC2_BASE 0xFFE02400
-#define PIOA_BASE 0xFFE02800
-#define PIOB_BASE 0xFFE02C00
-#define PIOC_BASE 0xFFE03000
-#define PIOD_BASE 0xFFE03400
-#define PIOE_BASE 0xFFE03800
-#define PSIF_BASE 0xFFE03C00
+#define ATMEL_BASE_SPI0 0xFFE00000
+#define ATMEL_BASE_SPI1 0xFFE00400
+#define ATMEL_BASE_TWI0 0xFFE00800
+#define ATMEL_BASE_USART0 0xFFE00C00
+#define ATMEL_BASE_USART1 0xFFE01000
+#define ATMEL_BASE_USART2 0xFFE01400
+#define ATMEL_BASE_USART3 0xFFE01800
+#define ATMEL_BASE_SSC0 0xFFE01C00
+#define ATMEL_BASE_SSC1 0xFFE02000
+#define ATMEL_BASE_SSC2 0xFFE02400
+#define ATMEL_BASE_PIOA 0xFFE02800
+#define ATMEL_BASE_PIOB 0xFFE02C00
+#define ATMEL_BASE_PIOC 0xFFE03000
+#define ATMEL_BASE_PIOD 0xFFE03400
+#define ATMEL_BASE_PIOE 0xFFE03800
+#define ATMEL_BASE_PSIF 0xFFE03C00
/* Devices on Peripheral Bus B (PBB) */
-#define SM_BASE 0xFFF00000
-#define INTC_BASE 0xFFF00400
-#define HMATRIX_BASE 0xFFF00800
-#define TIMER0_BASE 0xFFF00C00
-#define TIMER1_BASE 0xFFF01000
-#define PWM_BASE 0xFFF01400
-#define MACB0_BASE 0xFFF01800
-#define MACB1_BASE 0xFFF01C00
-#define DAC_BASE 0xFFF02000
-#define MMCI_BASE 0xFFF02400
-#define AUDIOC_BASE 0xFFF02800
-#define HISI_BASE 0xFFF02C00
-#define USB_BASE 0xFFF03000
-#define HSMC_BASE 0xFFF03400
-#define HSDRAMC_BASE 0xFFF03800
-#define ECC_BASE 0xFFF03C00
+#define ATMEL_BASE_SM 0xFFF00000
+#define ATMEL_BASE_INTC 0xFFF00400
+#define ATMEL_BASE_HMATRIX 0xFFF00800
+#define ATMEL_BASE_TIMER0 0xFFF00C00
+#define ATMEL_BASE_TIMER1 0xFFF01000
+#define ATMEL_BASE_PWM 0xFFF01400
+#define ATMEL_BASE_MACB0 0xFFF01800
+#define ATMEL_BASE_MACB1 0xFFF01C00
+#define ATMEL_BASE_DAC 0xFFF02000
+#define ATMEL_BASE_MMCI 0xFFF02400
+#define ATMEL_BASE_AUDIOC 0xFFF02800
+#define ATMEL_BASE_HISI 0xFFF02C00
+#define ATMEL_BASE_USB 0xFFF03000
+#define ATMEL_BASE_HSMC 0xFFF03400
+#define ATMEL_BASE_HSDRAMC 0xFFF03800
+#define ATMEL_BASE_ECC 0xFFF03C00
-#endif /* __AT32AP7000_MEMORY_MAP_H__ */
+#endif /* __AT32AP7000_HARDWARE_H__ */
diff --git a/arch/avr32/include/asm/arch-at32ap700x/portmux.h b/arch/avr32/include/asm/arch-at32ap700x/portmux.h
index 1ba52e5..859c121 100644
--- a/arch/avr32/include/asm/arch-at32ap700x/portmux.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/portmux.h
@@ -24,11 +24,11 @@
#include <asm/arch/gpio.h>
-#define PORTMUX_PORT_A ((void *)PIOA_BASE)
-#define PORTMUX_PORT_B ((void *)PIOB_BASE)
-#define PORTMUX_PORT_C ((void *)PIOC_BASE)
-#define PORTMUX_PORT_D ((void *)PIOD_BASE)
-#define PORTMUX_PORT_E ((void *)PIOE_BASE)
+#define PORTMUX_PORT_A ((void *)ATMEL_BASE_PIOA)
+#define PORTMUX_PORT_B ((void *)ATMEL_BASE_PIOB)
+#define PORTMUX_PORT_C ((void *)ATMEL_BASE_PIOC)
+#define PORTMUX_PORT_D ((void *)ATMEL_BASE_PIOD)
+#define PORTMUX_PORT_E ((void *)ATMEL_BASE_PIOE)
void portmux_enable_ebi(unsigned int bus_width, unsigned int addr_width,
unsigned long flags, unsigned long drive_strength);
diff --git a/arch/avr32/include/asm/hmatrix-common.h b/arch/avr32/include/asm/hmatrix-common.h
index 4b7e610..9a86fe4 100644
--- a/arch/avr32/include/asm/hmatrix-common.h
+++ b/arch/avr32/include/asm/hmatrix-common.h
@@ -117,7 +117,7 @@ struct hmatrix_regs {
/* Register access macros */
#define __hmatrix_reg(reg) \
- (((volatile struct hmatrix_regs *)HMATRIX_BASE)->reg)
+ (((volatile struct hmatrix_regs *)ATMEL_BASE_HMATRIX)->reg)
#define hmatrix_read(reg) \
(__hmatrix_reg(reg))
#define hmatrix_write(reg, value) \