diff options
author | Liu Hui-R64343 <r64343@freescale.com> | 2010-11-18 23:45:55 +0000 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2010-11-21 18:24:20 +0100 |
commit | 565e39c57769a45a5eaed5e4c86357e817cf64e1 (patch) | |
tree | 25d23788174cf199097d47052d3ae50b01b872aa /arch/arm | |
parent | a676cca41d52a89d9e3841170880e1234ec45606 (diff) | |
download | u-boot-imx-565e39c57769a45a5eaed5e4c86357e817cf64e1.zip u-boot-imx-565e39c57769a45a5eaed5e4c86357e817cf64e1.tar.gz u-boot-imx-565e39c57769a45a5eaed5e4c86357e817cf64e1.tar.bz2 |
imx: Get fec mac address from fuse
The patch is to support getting FEC MAC address from fuse bank.
Signed-off-by: Jason Liu <r64343@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/cpu/arm926ejs/mx25/generic.c | 12 | ||||
-rw-r--r-- | arch/arm/cpu/arm926ejs/mx27/generic.c | 12 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx5/soc.c | 14 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx25/imx-regs.h | 19 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx27/imx-regs.h | 20 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx5/imx-regs.h | 34 |
6 files changed, 96 insertions, 15 deletions
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index b80a389..c6e1146 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -260,4 +260,16 @@ void mx25_fec_init_pins (void) writel (outpadctl, &padctl->pad_fec_tdata1); } + +void imx_get_mac_from_fuse(unsigned char *mac) +{ + int i; + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + struct fuse_bank *bank = &iim->bank[0]; + struct fuse_bank0_regs *fuse = + (struct fuse_bank0_regs *)bank->fuse_regs; + + for (i = 0; i < 6; i++) + mac[i] = readl(&fuse->mac_addr[i]) & 0xff; +} #endif /* CONFIG_FEC_MXC */ diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c index ae2ce58..27642bf 100644 --- a/arch/arm/cpu/arm926ejs/mx27/generic.c +++ b/arch/arm/cpu/arm926ejs/mx27/generic.c @@ -313,6 +313,18 @@ void mx27_fec_init_pins(void) for (i = 0; i < ARRAY_SIZE(mode); i++) imx_gpio_mode(mode[i]); } + +void imx_get_mac_from_fuse(unsigned char *mac) +{ + int i; + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + struct fuse_bank *bank = &iim->bank[0]; + struct fuse_bank0_regs *fuse = + (struct fuse_bank0_regs *)bank->fuse_regs; + + for (i = 0; i < 6; i++) + mac[6 - 1 - i] = readl(&fuse->mac_addr[i]) & 0xff; +} #endif /* CONFIG_FEC_MXC */ #ifdef CONFIG_MXC_MMC diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c index 7c7a565..2900119 100644 --- a/arch/arm/cpu/armv7/mx5/soc.c +++ b/arch/arm/cpu/armv7/mx5/soc.c @@ -100,6 +100,20 @@ int cpu_eth_init(bd_t *bis) return rc; } +#if defined(CONFIG_FEC_MXC) +void imx_get_mac_from_fuse(unsigned char *mac) +{ + int i; + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + struct fuse_bank *bank = &iim->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + + for (i = 0; i < 6; i++) + mac[i] = readl(&fuse->mac_addr[i]) & 0xff; +} +#endif + /* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h index f5a2929..55ad115 100644 --- a/arch/arm/include/asm/arch-mx25/imx-regs.h +++ b/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -36,6 +36,7 @@ #ifndef __ASSEMBLY__ #ifdef CONFIG_FEC_MXC extern void mx25_fec_init_pins(void); +extern void imx_get_mac_from_fuse(unsigned char *mac); #endif /* Clock Control Module (CCM) registers */ @@ -129,12 +130,17 @@ struct iim_regs { u32 iim_srev; u32 iim_prog_p; u32 res1[0x1f5]; - u32 iim_bank_area0[0x20]; - u32 res2[0xe0]; - u32 iim_bank_area1[0x20]; - u32 res3[0xe0]; - u32 iim_bank_area2[0x20]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[3]; }; + +struct fuse_bank0_regs { + u32 fuse0_25[0x1a]; + u32 mac_addr[6]; +}; + #endif /* AIPS 1 */ @@ -312,7 +318,4 @@ struct iim_regs { #define WSR_UNLOCK1 0x5555 #define WSR_UNLOCK2 0xAAAA -/* FUSE bank offsets */ -#define IIM0_MAC 0x1a - #endif /* _IMX_REGS_H */ diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index 6ecddaa..8f40aa7 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -34,6 +34,7 @@ extern void mx27_uart_init_pins(void); #ifdef CONFIG_FEC_MXC extern void mx27_fec_init_pins(void); +extern void imx_get_mac_from_fuse(unsigned char *mac); #endif /* CONFIG_FEC_MXC */ #ifdef CONFIG_MXC_MMC @@ -202,9 +203,19 @@ struct iim_regs { u32 iim_scs1; u32 iim_scs2; u32 iim_scs3; - u32 res[0x1F0]; - u32 iim_bank_area0[0x100]; + u32 res[0x1f1]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[1]; }; + +struct fuse_bank0_regs { + u32 fuse0_3[5]; + u32 mac_addr[6]; + u32 fuse10_31[0x16]; +}; + #endif #define IMX_IO_BASE 0x10000000 @@ -512,9 +523,4 @@ struct iim_regs { #define IIM_ERR_SNSE (1 << 2) #define IIM_ERR_PARITYE (1 << 1) -/* Definitions for i.MX27 TO2 */ -#define IIM0_MAC 5 -#define IIM0_SCC_KEY 11 -#define IIM1_SUID 1 - #endif /* _IMX_REGS_H */ diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index 0b6249a..b45026d 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -205,9 +205,13 @@ #define BOARD_REV_1_0 0x0 #define BOARD_REV_2_0 0x1 +#define IMX_IIM_BASE (IIM_BASE_ADDR) + #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include <asm/types.h> +extern void imx_get_mac_from_fuse(unsigned char *mac); + #define __REG(x) (*((volatile u32 *)(x))) #define __REG16(x) (*((volatile u16 *)(x))) #define __REG8(x) (*((volatile u8 *)(x))) @@ -275,6 +279,36 @@ struct src { u32 sisr; u32 simr; }; + +struct iim_regs { + u32 stat; + u32 statm; + u32 err; + u32 emask; + u32 fctl; + u32 ua; + u32 la; + u32 sdat; + u32 prev; + u32 srev; + u32 preg_p; + u32 scs0; + u32 scs1; + u32 scs2; + u32 scs3; + u32 res0[0x1f1]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[4]; +}; + +struct fuse_bank1_regs { + u32 fuse0_8[9]; + u32 mac_addr[6]; + u32 fuse15_31[0x11]; +}; + #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_MXC_MX51_H__ */ |