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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-09-26 13:13:16 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-10-10 10:03:23 +0900
commitdacdb2402742a0365ca543798a349182872131b4 (patch)
tree96175d1e6b0f6ed8fed9a8a9b7a89fc46a525092 /arch/arm
parentf5fd45ff64e28a73499548358e3d1ceda0de7daf (diff)
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ARM: uniphier: do not setup pins for System Bus on NAND boot mode
For LD11 and LD20 SoCs, the System Bus and NAND are multiplexed in the same I/O pins. When booting from a NAND device, pin-mux for the System Bus must not be set-up because they are exclusive with each other. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-uniphier/init/init-ld11.c4
-rw-r--r--arch/arm/mach-uniphier/init/init-ld20.c4
2 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-uniphier/init/init-ld11.c b/arch/arm/mach-uniphier/init/init-ld11.c
index e324c94..fdb2838 100644
--- a/arch/arm/mach-uniphier/init/init-ld11.c
+++ b/arch/arm/mach-uniphier/init/init-ld11.c
@@ -15,7 +15,9 @@ int uniphier_ld11_init(const struct uniphier_board_data *bd)
{
uniphier_sbc_init_savepin(bd);
uniphier_pxs2_sbc_init(bd);
- uniphier_pin_init("system_bus_grp");
+ /* pins for NAND and System Bus are multiplexed */
+ if (spl_boot_device() != BOOT_DEVICE_NAND)
+ uniphier_pin_init("system_bus_grp");
support_card_reset();
diff --git a/arch/arm/mach-uniphier/init/init-ld20.c b/arch/arm/mach-uniphier/init/init-ld20.c
index cb05421..37b860a 100644
--- a/arch/arm/mach-uniphier/init/init-ld20.c
+++ b/arch/arm/mach-uniphier/init/init-ld20.c
@@ -15,7 +15,9 @@ int uniphier_ld20_init(const struct uniphier_board_data *bd)
{
uniphier_sbc_init_savepin(bd);
uniphier_pxs2_sbc_init(bd);
- uniphier_pin_init("system_bus_grp");
+ /* pins for NAND and System Bus are multiplexed */
+ if (spl_boot_device() != BOOT_DEVICE_NAND)
+ uniphier_pin_init("system_bus_grp");
support_card_reset();