summaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
authorMichal Simek <michal.simek@xilinx.com>2015-07-22 11:39:04 +0200
committerMichal Simek <michal.simek@xilinx.com>2015-07-28 11:56:26 +0200
commit6d6e3dbefe1a518bc8fb6a23808770568ff4c125 (patch)
tree846ec9b92bce2cf95f5a322a634f0c271b74cc58 /arch/arm
parent5c45b166783493615f884affa7ef505bbd4d7f34 (diff)
downloadu-boot-imx-6d6e3dbefe1a518bc8fb6a23808770568ff4c125.zip
u-boot-imx-6d6e3dbefe1a518bc8fb6a23808770568ff4c125.tar.gz
u-boot-imx-6d6e3dbefe1a518bc8fb6a23808770568ff4c125.tar.bz2
ARM: zynq: Add support for zc770-xm011
Add xm011 DTS file and related configs and configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/zynq-zc770-xm011.dts65
2 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 8ebd693..06fbd8b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -45,6 +45,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
zynq-microzed.dtb \
zynq-picozed.dtb \
zynq-zc770-xm010.dtb \
+ zynq-zc770-xm011.dtb \
zynq-zc770-xm012.dtb \
zynq-zc770-xm013.dtb
dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb
diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts
new file mode 100644
index 0000000..d38c820
--- /dev/null
+++ b/arch/arm/dts/zynq-zc770-xm011.dts
@@ -0,0 +1,65 @@
+/*
+ * Xilinx ZC770 XM013 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+/ {
+ compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000";
+ model = "Xilinx Zynq";
+
+ aliases {
+ i2c0 = &i2c1;
+ serial0 = &uart1;
+ spi0 = &spi0;
+ };
+
+ chosen {
+ bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
+ linux,stdout-path = &uart1;
+ stdout-path = &uart1;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x40000000>;
+ };
+
+ usb_phy1: phy1 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ };
+};
+
+&spi0 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+};
+
+&can0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ m24c02_eeprom@52 {
+ compatible = "at,24c02";
+ reg = <0x52>;
+ };
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+ dr_mode = "host";
+ usb-phy = <&usb_phy1>;
+};