diff options
author | Vitaly Andrianov <vitalya@ti.com> | 2015-02-11 14:07:58 -0500 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2015-02-16 12:41:41 -0500 |
commit | 66c98a0c3807720a32ce49c9ba2a5808555062d7 (patch) | |
tree | f529bcd2aad0df100e358b6555885027a33868f8 /arch/arm | |
parent | bba379d498b4ed408e79f7aec6dc23a3572c37e7 (diff) | |
download | u-boot-imx-66c98a0c3807720a32ce49c9ba2a5808555062d7.zip u-boot-imx-66c98a0c3807720a32ce49c9ba2a5808555062d7.tar.gz u-boot-imx-66c98a0c3807720a32ce49c9ba2a5808555062d7.tar.bz2 |
keystone2: ddr3: eliminate using global ddr3_size variable
KS2 ddr3 initialization uses ddr3_size global variable before u-boot
relocation. Even if the variable is not being used after relocation,
writing to it corrupts relocation table.
This patch removes the global ddr3_size variable and uses local one
instead.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/cpu/armv7/keystone/ddr3.c | 5 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-keystone/ddr3.h | 5 |
2 files changed, 3 insertions, 7 deletions
diff --git a/arch/arm/cpu/armv7/keystone/ddr3.c b/arch/arm/cpu/armv7/keystone/ddr3.c index 923906a..dfb27b5 100644 --- a/arch/arm/cpu/armv7/keystone/ddr3.c +++ b/arch/arm/cpu/armv7/keystone/ddr3.c @@ -263,17 +263,14 @@ static void ddr3_map_ecc_cic2_irq(u32 base) } #endif -void ddr3_init_ecc(u32 base) +void ddr3_init_ecc(u32 base, u32 ddr3_size) { - u32 ddr3_size; - if (!ddr3_ecc_support_rmw(base)) { ddr3_disable_ecc(base); return; } ddr3_ecc_init_range(base); - ddr3_size = ddr3_get_size(); ddr3_reset_data(CONFIG_SYS_SDRAM_BASE, ddr3_size); /* mapping DDR3 ECC system interrupt from CIC2 to GIC */ diff --git a/arch/arm/include/asm/arch-keystone/ddr3.h b/arch/arm/include/asm/arch-keystone/ddr3.h index b044d6f..a22c237 100644 --- a/arch/arm/include/asm/arch-keystone/ddr3.h +++ b/arch/arm/include/asm/arch-keystone/ddr3.h @@ -48,10 +48,9 @@ struct ddr3_emif_config { unsigned int sdrfc; }; -void ddr3_init(void); -int ddr3_get_size(void); +u32 ddr3_init(void); void ddr3_reset_ddrphy(void); -void ddr3_init_ecc(u32 base); +void ddr3_init_ecc(u32 base, u32 ddr3_size); void ddr3_disable_ecc(u32 base); void ddr3_check_ecc_int(u32 base); int ddr3_ecc_support_rmw(u32 base); |