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authorJeffy Chen <jeffy.chen@rock-chips.com>2015-11-27 12:07:16 +0800
committerSimon Glass <sjg@chromium.org>2015-12-13 17:07:06 -0700
commit5cc5b901e6d319af18b8dc59537c503bbd3ca7f0 (patch)
tree1a1f8acf7594f27ce86623db443fef261446a72f /arch/arm
parent5076c64a08d2083af5a7761b12a30116ef0da967 (diff)
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Revert "rockchip: Add max spl size & spl header configs"
This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-rockchip/Kconfig15
-rw-r--r--arch/arm/mach-rockchip/rk3036/Kconfig6
-rw-r--r--arch/arm/mach-rockchip/rk3288/Kconfig6
3 files changed, 0 insertions, 27 deletions
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index aef1a45..d3bddb7 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -17,21 +17,6 @@ config ROCKCHIP_RK3036
and video codec support. Peripherals include Gigabit Ethernet,
USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
-config ROCKCHIP_SPL_HDR
- string "Header of rockchip's spl loader"
- help
- Rockchip's bootrom requires the spl loader to start with a 4-bytes
- header. The content of this header depends on the chip type.
-
-config ROCKCHIP_MAX_SPL_SIZE
- hex "Max size of rockchip's spl loader"
- help
- Different chip may have different sram size. And if we want to jump
- back to the bootrom after spl, we may need to reserve some sram space
- for the bootrom.
- The max spl loader size should be sram size minus reserved
- size(if needed)
-
config SYS_MALLOC_F
default y
diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig
index 95fb2b9..0fbc58e 100644
--- a/arch/arm/mach-rockchip/rk3036/Kconfig
+++ b/arch/arm/mach-rockchip/rk3036/Kconfig
@@ -9,12 +9,6 @@ config SYS_SOC
config SYS_MALLOC_F_LEN
default 0x400
-config ROCKCHIP_SPL_HDR
- default "RK30"
-
-config ROCKCHIP_MAX_SPL_SIZE
- default 0x1000
-
config ROCKCHIP_COMMON
bool "Support rk common fuction"
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 3de3878..d0a7276 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -16,12 +16,6 @@ config TARGET_CHROMEBOOK_JERRY
WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
the keyboard and battery functions.
-config ROCKCHIP_SPL_HDR
- default "RK32"
-
-config ROCKCHIP_MAX_SPL_SIZE
- default 0x8000
-
config SYS_SOC
default "rockchip"