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| author | Marek Vasut <marex@denx.de> | 2014-09-15 02:44:36 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2014-10-06 17:40:21 +0200 |
| commit | ff7e9700eda14ccf8ebe399d3831ef266e743c2d (patch) | |
| tree | 9bd837293a6b70f56f4d5ea02d67d8236590b8dc /arch/arm | |
| parent | be9f643ae6aa9044c60fe80e3a2c10be8371c692 (diff) | |
| download | u-boot-imx-ff7e9700eda14ccf8ebe399d3831ef266e743c2d.zip u-boot-imx-ff7e9700eda14ccf8ebe399d3831ef266e743c2d.tar.gz u-boot-imx-ff7e9700eda14ccf8ebe399d3831ef266e743c2d.tar.bz2 | |
arm: cache: Add support for write-allocate D-Cache
Add configuration for the write-allocate mode of L1 D-Cache on ARM.
This is needed for D-Cache operation on Cortex-A9 on the SoCFPGA .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/include/asm/system.h | 1 | ||||
| -rw-r--r-- | arch/arm/lib/cache-cp15.c | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index d51ba66..ca2d44f 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -185,6 +185,7 @@ enum dcache_option { DCACHE_OFF = 0x12, DCACHE_WRITETHROUGH = 0x1a, DCACHE_WRITEBACK = 0x1e, + DCACHE_WRITEALLOC = 0x16, }; /* Size of an MMU section */ diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 3e62d58..2155fe8 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -73,6 +73,8 @@ __weak void dram_bank_mmu_setup(int bank) i++) { #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH) set_section_dcache(i, DCACHE_WRITETHROUGH); +#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC) + set_section_dcache(i, DCACHE_WRITEALLOC); #else set_section_dcache(i, DCACHE_WRITEBACK); #endif |